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8e021d96b3c1844093f9d692bd8a30364bd0e9a9
system76-coreboot/src
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Angel Pons 8e021d96b3 mb/**/cmos.layout: Drop copy-pasted SNB entries on non-SNB 
Only Sandy Bridge MRC stores scrambler seeds in CMOS. Non-Sandybridge
boards ended up with these entries because of copy-paste programming.

Change-Id: I5a5bda6ea4e63ba03a4219bb2a6aa546bb6ecd7a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47149
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-24 17:47:15 +00:00
..
acpi
ACPI: Define acpi_get_preferred_pm_profile()
2020-11-19 22:58:41 +00:00
arch
cpu/intel/common: Fill cpu voltage in SMBIOS tables
2020-11-22 22:31:40 +00:00
commonlib
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
console
console: Override uart base address
2020-11-09 07:46:10 +00:00
cpu
cpu/intel/common: Fill cpu voltage in SMBIOS tables
2020-11-22 22:31:40 +00:00
device
device/pci: Add NULL check for PCI driver's .ops
2020-11-16 12:15:38 +00:00
drivers
drivers/tpm: Move PPI stub
2020-11-22 22:27:29 +00:00
ec
ec/google/chromeec: Add more wrappers for regulator control
2020-11-18 06:13:12 +00:00
include
soc/intel/skylake: Use correct NHLT_PDM_DEV definition
2020-11-24 09:42:14 +00:00
lib
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
mainboard
mb/**/cmos.layout: Drop copy-pasted SNB entries on non-SNB
2020-11-24 17:47:15 +00:00
northbridge
nb/amd/agesa/family15tn: define macros for GNB and IOMMU devices
2020-11-23 19:18:03 +00:00
security
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
soc
soc/intel/xeon_sp: Enable SMI handler
2020-11-24 12:44:28 +00:00
southbridge
sb/intel/lynxpoint: Drop invalid SATA registers
2020-11-23 13:00:14 +00:00
superio
superio/smsc/sio1036: Support 16-bit IO port addressing
2020-11-18 13:12:11 +00:00
vendorcode
vendorcode/eltan/security: Add dependency for menu items
2020-11-22 22:27:43 +00:00
Kconfig
soc/intel/xeon_sp: Move function debug macros
2020-10-29 16:44:19 +00:00