8fff297ea9
Add a driver which puts the device into power-saving mode. BUG=b:177955523 BRANCH=zork TEST=boot and see this message: BayHub LV2: Power-saving enabled 110102 Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Change-Id: Idc1340b1a6fe7063d16c8ea16488d6e2b8b308cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/49783 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
70 lines
2.4 KiB
C
70 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Driver for BayHub Technology LV2 PCI to SD bridge */
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <device/pci_ids.h>
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#include "chip.h"
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#include "lv2.h"
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static void lv2_init(struct device *dev)
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{
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struct drivers_generic_bayhub_lv2_config *config = dev->chip_info;
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pci_dev_init(dev);
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if (!config || !config->enable_power_saving)
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return;
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/*
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* This procedure for enabling power-saving mode is from the
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* BayHub BIOS Implementation Guideline document.
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*/
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pci_write_config32(dev, LV2_PROTECT, LV2_PROTECT_OFF | LV2_PROTECT_LOCK_OFF);
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pci_or_config32(dev, LV2_PCR_HEX_FC, LV2_PCIE_PHY_P1_ENABLE);
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pci_update_config32(dev, LV2_PCR_HEX_E0, LV2_PCI_PM_L1_TIMER_MASK, LV2_PCI_PM_L1_TIMER);
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pci_update_config32(dev, LV2_PCR_HEX_FC, LV2_ASPM_L1_TIMER_MASK, LV2_ASPM_L1_TIMER);
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pci_or_config32(dev, LV2_PCR_HEX_A8, LV2_LTR_ENABLE);
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pci_write_config32(dev, LV2_PCR_HEX_234, LV2_MAX_LATENCY_SETTING);
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pci_update_config32(dev, LV2_PCR_HEX_248, LV2_L1_SUBSTATE_SETTING_MASK,
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LV2_L1_SUBSTATE_SETTING);
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pci_update_config32(dev, LV2_PCR_HEX_3F4, LV2_L1_SUBSTATE_OPTIMISE_MASK,
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LV2_L1_SUBSTATE_OPTIMISE);
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pci_or_config32(dev, LV2_LINK_CTRL, LV2_LINK_CTRL_CLKREQ);
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pci_update_config32(dev, LV2_PCR_HEX_300, LV2_TUNING_WINDOW_MASK, LV2_TUNING_WINDOW);
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pci_update_config32(dev, LV2_PCR_HEX_304, LV2_DRIVER_STRENGTH_MASK,
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LV2_DRIVER_STRENGTH);
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pci_update_config32(dev, LV2_PCR_HEX_308, LV2_RESET_DMA_DISABLE_MASK,
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LV2_RESET_DMA_DISABLE);
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pci_update_config32(dev, LV2_LINK_CTRL, LV2_LINK_CTRL_L1_L0_MASK,
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LV2_LINK_CTRL_L1_ENABLE);
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pci_write_config32(dev, LV2_PROTECT, LV2_PROTECT_ON | LV2_PROTECT_LOCK_ON);
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printk(BIOS_INFO, "BayHub LV2: Power-saving enabled (link_ctrl=%#x)\n",
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pci_read_config32(dev, LV2_LINK_CTRL));
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}
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static struct device_operations lv2_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.ops_pci = &pci_dev_ops_pci,
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.init = lv2_init,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_O2_LV2,
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0
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};
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static const struct pci_driver bayhub_lv2 __pci_driver = {
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.ops = &lv2_ops,
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.vendor = PCI_VENDOR_ID_O2,
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.devices = pci_device_ids,
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};
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struct chip_operations drivers_generic_bayhub_lv2_ops = {
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CHIP_NAME("BayHub Technology LV2 PCIe to SD bridge")
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};
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