Files
system76-coreboot/src/soc/amd/mendocino/acpi/soc.asl
Tim Van Patten 9244358536 soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery
DPTC settings.

1. Refactor and simplify acpigen_write_alib_dptc() into the following
   functions:
   - acpigen_write_alib_dptc_default()
   - acpigen_write_alib_dptc_tablet()
2. Add device tree register value dptc_tablet_mode_enable to control
   whether DPTC tablet mode is enabled for a variant.
3. Add dptc.asl to perform the necessary ACPI checking before modifying
   the DPTC settings.

BRANCH=none
BUG=b:217911928
TEST=Build zork
TEST=Build nipperkin
TEST=Boot skyrim

Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0
Signed-off-by: Tim Van Patten <timvp@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-09-12 12:21:01 +00:00

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/* SPDX-License-Identifier: GPL-2.0-only */
/* TODO: Check if this is still correct */
#include "globalnvs.asl"
Scope(\_SB) {
/* global utility methods expected within the \_SB scope */
#include <arch/x86/acpi/globutil.asl>
#include <soc/amd/common/acpi/gpio_bank_lib.asl>
#include <soc/amd/common/acpi/osc.asl>
#include "pci_int_defs.asl"
#include <soc/amd/common/acpi/pci_int.asl>
#include "mmio.asl"
#include "pci0.asl"
} /* End \_SB scope */
#include <soc/amd/common/acpi/alib.asl>
#include <soc/amd/common/acpi/platform.asl>
#include <soc/amd/common/acpi/sleepstates.asl>
#include <soc/amd/common/acpi/upep.asl>
#include <soc/amd/common/acpi/dptc.asl>
#include "rtc_workaround.asl"
/*
* Platform Notify
*
* This is called by soc/amd/common/acpi/platform.asl.
*/
Method (PNOT)
{
/* Report AC/DC state to ALIB using WAL1() */
\WAL1 ()
}