93b4ed91f6
No longer include northbridge files directly in the source for mainboard romstage.c and fix includes. Also make required adjustments to function declarations. Change-Id: Iafdcc0766ed44c64cc628e5935eef2c6372f5f22 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/906 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
286 lines
6.5 KiB
C
286 lines
6.5 KiB
C
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#include <device/pci_def.h>
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#include <console/console.h>
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#include <stdlib.h>
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <spd.h>
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#include "raminit.h"
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#include "debug.h"
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/*
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* generic debug code, used by mainboard specific romstage.c
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*
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*/
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void print_debug_pci_dev(unsigned dev)
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{
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print_debug("PCI: ");
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print_debug_hex8((dev >> 16) & 0xff);
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print_debug_char(':');
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print_debug_hex8((dev >> 11) & 0x1f);
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print_debug_char('.');
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print_debug_hex8((dev >> 8) & 7);
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}
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void print_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0xff, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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print_debug_pci_dev(dev);
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print_debug("\n");
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}
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}
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void dump_pci_device(unsigned dev)
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{
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int i;
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print_debug_pci_dev(dev);
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for(i = 0; i < 256; i++) {
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unsigned char val;
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if ((i & 0x0f) == 0) {
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "\n%02x:",i);
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#else
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print_debug("\n");
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print_debug_hex8(i);
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print_debug_char(':');
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#endif
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}
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val = pci_read_config8(dev, i);
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, " %02x", val);
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#else
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print_debug_char(' ');
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print_debug_hex8(val);
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#endif
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}
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print_debug("\n");
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}
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void dump_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0xff, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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}
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}
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void dump_pci_devices_on_bus(unsigned busn)
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{
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device_t dev;
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for(dev = PCI_DEV(busn, 0, 0);
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dev <= PCI_DEV(busn, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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}
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}
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void dump_spd_registers(const struct mem_controller *ctrl)
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{
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int i;
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print_debug("\n");
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for(i = 0; i < 4; i++) {
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unsigned device;
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device = ctrl->channel0[i];
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if (device) {
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int j;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
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#else
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".0: ");
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print_debug_hex8(device);
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#endif
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for(j = 0; j < 128; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "\n%02x: ", j);
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#else
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print_debug("\n");
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print_debug_hex8(j);
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print_debug(": ");
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#endif
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}
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status = spd_read_byte(device, j);
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if (status < 0) {
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break;
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}
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byte = status & 0xff;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "%02x ", byte);
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#else
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print_debug_hex8(byte);
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print_debug_char(' ');
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#endif
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}
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print_debug("\n");
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}
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device = ctrl->channel1[i];
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if (device) {
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int j;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
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#else
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".1: ");
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print_debug_hex8(device);
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#endif
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for(j = 0; j < 128; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "\n%02x: ", j);
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#else
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print_debug("\n");
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print_debug_hex8(j);
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print_debug(": ");
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#endif
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}
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status = spd_read_byte(device, j);
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if (status < 0) {
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break;
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}
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byte = status & 0xff;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "%02x ", byte);
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#else
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print_debug_hex8(byte);
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print_debug_char(' ');
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#endif
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}
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print_debug("\n");
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}
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}
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}
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void dump_smbus_registers(void)
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{
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unsigned device;
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print_debug("\n");
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for(device = 1; device < 0x80; device++) {
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int j;
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if( spd_read_byte(device, 0) < 0 ) continue;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "smbus: %02x", device);
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#else
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print_debug("smbus: ");
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print_debug_hex8(device);
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#endif
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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status = spd_read_byte(device, j);
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if (status < 0) {
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break;
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}
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if ((j & 0xf) == 0) {
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "\n%02x: ",j);
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#else
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print_debug("\n");
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print_debug_hex8(j);
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print_debug(": ");
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#endif
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}
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byte = status & 0xff;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "%02x ", byte);
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#else
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print_debug_hex8(byte);
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print_debug_char(' ');
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#endif
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}
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print_debug("\n");
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}
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}
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void dump_io_resources(unsigned port)
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{
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int i;
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "%04x:\n", port);
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#else
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print_debug_hex16(port);
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print_debug(":\n");
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#endif
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for(i=0;i<256;i++) {
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uint8_t val;
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if ((i & 0x0f) == 0) {
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "%02x:", i);
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#else
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print_debug_hex8(i);
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print_debug_char(':');
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#endif
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}
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val = inb(port);
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, " %02x",val);
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#else
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print_debug_char(' ');
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print_debug_hex8(val);
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#endif
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if ((i & 0x0f) == 0x0f) {
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print_debug("\n");
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}
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port++;
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}
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}
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void dump_mem(unsigned start, unsigned end)
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{
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unsigned i;
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print_debug("dump_mem:");
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for(i=start;i<end;i++) {
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if((i & 0xf)==0) {
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, "\n%08x:", i);
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#else
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print_debug("\n");
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print_debug_hex32(i);
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print_debug(":");
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#endif
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}
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#if !defined(__ROMCC__)
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printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
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#else
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print_debug(" ");
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print_debug_hex8((unsigned char)*((unsigned char *)i));
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#endif
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}
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print_debug("\n");
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}
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