Provide devicetree.cb RAMstage configuration of this superio component. Change-Id: I376d2fb6dafc301cbc437518012f8c43b0af4be2 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5668 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
35 lines
1.2 KiB
C
35 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SUPERIO_ITE_IT8728F_CHIP_H
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#define SUPERIO_ITE_IT8728F_CHIP_H
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struct superio_ite_it8728f_config {
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/* HWM configuration registers */
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uint8_t hwm_ctl_register;
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uint8_t hwm_main_ctl_register;
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uint8_t hwm_adc_temp_chan_en_reg;
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uint8_t hwm_fan1_ctl_pwm;
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uint8_t hwm_fan2_ctl_pwm;
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uint8_t hwm_fan3_ctl_pwm;
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};
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#endif /* SUPERIO_ITE_IT8728F_CHIP_H */
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