This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
		
			
				
	
	
		
			98 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			98 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
/*
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 *
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 * Copyright (C) 2008 Advanced Micro Devices, Inc.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 * 3. The name of the author may not be used to endorse or promote products
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 *    derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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 * SUCH DAMAGE.
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 */
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#if CONFIG(LP_ARCH_X86_64)
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OUTPUT_FORMAT(elf64-x86-64)
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OUTPUT_ARCH(x86_64)
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#else
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OUTPUT_FORMAT(elf32-i386)
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OUTPUT_ARCH(i386)
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#endif
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ENTRY(_entry)
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SECTIONS
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{
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	. = CONFIG_LP_BASE_ADDRESS;
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	. = ALIGN(16);
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	_start = .;
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	.text : {
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		_text = .;
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		*(.text._entry)
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		*(.text)
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		*(.text.*)
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		_etext = .;
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	}
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	.rodata : {
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		_rodata = .;
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		*(.rodata)
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		*(.rodata.*)
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		_erodata = .;
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	}
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	.data : {
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		_data = .;
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		*(.data)
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		*(.data.*)
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		_edata = .;
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	}
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	.bss : {
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		_bss = .;
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		*(.sbss)
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		*(.sbss.*)
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		*(.bss)
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		*(.bss.*)
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		*(COMMON)
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		_ebss = .;
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		/* Stack and heap */
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		. = ALIGN(16);
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		_heap = .;
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		. += CONFIG_LP_HEAP_SIZE;
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		. = ALIGN(16);
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		_eheap = .;
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		_stack = .;
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		. += CONFIG_LP_STACK_SIZE;
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		. = ALIGN(16);
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		_estack = .;
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	}
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	_end = .;
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	/DISCARD/ : {
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		*(.comment)
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		*(.note*)
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	}
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}
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