9634547eae
Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
24 lines
588 B
C
24 lines
588 B
C
#ifndef _CPU_AMD_CAR_H
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#define _CPU_AMD_CAR_H
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#include <arch/cpu.h>
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
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void done_cache_as_ram_main(void);
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void post_cache_as_ram(void);
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void cache_as_ram_switch_stack(void *stacktop);
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void cache_as_ram_new_stack(void);
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#if IS_ENABLED(CONFIG_CPU_AMD_AGESA) || IS_ENABLED(CONFIG_CPU_AMD_PI) || \
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IS_ENABLED(CONFIG_SOC_AMD_PI)
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void disable_cache_as_ram(void);
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#endif
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void asmlinkage early_all_cores(void);
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void * asmlinkage romstage_main(unsigned long bist);
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void asmlinkage romstage_after_car(void);
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#endif
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