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system76-coreboot/src
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Angel Pons 96a06dd464 nb/intel/sandybridge: Rename loop variable 
The `discover_edges_real` function actually tests a range of values for
DQS PI and evaluates how the system responds. Rename the loop variable.

Change-Id: I67390ba315d618d153f91c0e8a81db04ec8f63e1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47606
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-20 22:07:56 +00:00
..
acpi
ACPI: Define acpi_get_preferred_pm_profile()
2020-11-19 22:58:41 +00:00
arch
ACPI S3: Split arch-agnostic parts
2020-11-19 22:58:11 +00:00
commonlib
commonlib: Add timestamp values for forced delays
2020-11-16 11:01:37 +00:00
console
console: Override uart base address
2020-11-09 07:46:10 +00:00
cpu
ACPI S3: Replace acpi_is_wakeup()
2020-11-19 14:48:31 +00:00
device
device/pci: Add NULL check for PCI driver's .ops
2020-11-16 12:15:38 +00:00
drivers
intel/fsp2_0: Add soc_validate_fsp_version for FSP version check
2020-11-20 18:58:54 +00:00
ec
ec/google/chromeec: Add more wrappers for regulator control
2020-11-18 06:13:12 +00:00
include
ACPI: Define acpi_get_preferred_pm_profile()
2020-11-19 22:58:41 +00:00
lib
ACPI S3: Replace acpi_is_wakeup()
2020-11-19 14:48:31 +00:00
mainboard
mb/google/zork: Remove 50ms WIFI delay
2020-11-20 19:30:48 +00:00
northbridge
nb/intel/sandybridge: Rename loop variable
2020-11-20 22:07:56 +00:00
security
vboot: stop implementing VbExDisplayScreen
2020-11-18 05:49:46 +00:00
soc
soc/intel/xeon_sp/cpx: Modify PCH_IOAPIC_BUS_NUMBER
2020-11-20 10:18:57 +00:00
southbridge
soc/amd/common: remove SOC_AMD_COMMON_BLOCK Kconfig symbol
2020-11-18 16:08:17 +00:00
superio
superio/smsc/sio1036: Support 16-bit IO port addressing
2020-11-18 13:12:11 +00:00
vendorcode
vc/intel/fsp2/denverton_ns: Remove unused files
2020-11-20 15:25:11 +00:00
Kconfig
soc/intel/xeon_sp: Move function debug macros
2020-10-29 16:44:19 +00:00