96dc015519
This reverts commit a5ca4a0c75.
Reason for revert: Breaks coreboot tree because of non existent kconfig symbol
Change-Id: Ib8f55dc2f6444690945bc2dc64baad5d0c39cdf4
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
96 lines
3.8 KiB
Plaintext
96 lines
3.8 KiB
Plaintext
## SPDX-License-Identifier: GPL-2.0-or-later
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chip soc/intel/xeon_sp/cpx
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqb_routing" = "PCH_IRQ10"
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register "pirqc_routing" = "PCH_IRQ11"
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register "pirqd_routing" = "PCH_IRQ11"
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register "pirqe_routing" = "PCH_IRQ11"
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register "pirqf_routing" = "PCH_IRQ11"
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register "pirqg_routing" = "PCH_IRQ11"
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register "pirqh_routing" = "PCH_IRQ11"
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# configure device interrupt routing
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register "ir00_routing" = "0x3210" # IR00, Dev31
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register "ir01_routing" = "0x3210" # IR01, Dev30
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register "ir02_routing" = "0x3210" # IR02, Dev29
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register "ir03_routing" = "0x3210" # IR03, Dev28
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register "ir04_routing" = "0x3210" # IR04, Dev27
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# configure interrupt polarity control
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register "ipc0" = "0x00ff4000" # IPC0, PIRQA-H (IRQ16-23) should always be ActiveLow
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register "ipc1" = "0x00000000" # IPC1
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register "ipc2" = "0x00000000" # IPC2
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register "ipc3" = "0x00000000" # IPC3
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# configure MSR_TURBO_RATIO_LIMIT, MSR_TURBO_RATIO_LIMIT_CORES msrs
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# FB production turbo_ratio_limit is 0x1f1f1f2022222325
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register "turbo_ratio_limit" = "0x1b1b1b1d20222325"
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# FB production turbo_ratio_limit_cores is 0x1c1812100c080402
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register "turbo_ratio_limit_cores" = "0x1c1814100c080402"
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# configure PSTATE_REQ_RATIO for MSR_IA32_PERF_CTRL
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register "pstate_req_ratio" = "0xa"
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register "coherency_support" = "0"
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register "ats_support" = "0"
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register "gen1_dec" = "0x00fc0601" # BIC in-band update support
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register "gen2_dec" = "0x000c0ca1" # IPMI KCS
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# configure PCH PCIe port
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register "pch_pci_port[8]" = "{
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.ForceEnable = 0x1,
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.PortLinkSpeed = PcieAuto,
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}"
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device cpu_cluster 0 on
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device lapic 0 on end
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end
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device domain 0 on
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device pci 00.0 on end # Host bridge
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device pci 04.0 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.1 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.2 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.3 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.4 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.5 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.6 on end # Intel SkyLake-E CBDMA Registers
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device pci 04.7 on end # Intel SkyLake-E CBDMA Registers
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device pci 05.0 on end # Intel SkyLake-E MM/Vt-d Configuration Registers
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device pci 05.2 on end # Intel SkyLake-E RAS
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device pci 05.4 on end # Intel SkyLake-E IOAPIC
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device pci 08.0 on end # System peripheral: Intel SkyLake-E Ubox Registers
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device pci 08.1 on end # Performance counters: Intel SkyLake-E Ubox Registers
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device pci 08.2 on end # System peripheral: Intel SkyLake-E Ubox Registers
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device pci 11.0 on end # Intel Device a26c: PCU
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# PCH devices
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device pci 11.5 on end # Intel C620 Series Chipset Family SSATA Controller [AHCI mode]
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device pci 14.0 on end # Intel C620 Series Chipset Family USB 3.0 xHCI Controller
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device pci 14.2 on end # Signal processing controller: Intel Device a231
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device pci 16.0 on end # Communication controller: Intel Device a23a
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device pci 16.1 on end # Communication controller: Intel Device a23b
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device pci 16.4 on end # Communication controller: Intel Device a23e
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device pci 1c.0 on end # PCI bridge: Intel Device a210
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device pci 1c.4 on end # PCI bridge: Intel Device a214
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device pci 1c.5 on end # PCI bridge: Intel Device a215
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device pci 1d.0 on end # PCI bridge: Intel Device a218
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device pci 1f.0 on
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chip drivers/ipmi # BMC KCS
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device pnp ca2.0 on end
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register "bmc_i2c_address" = "0x20"
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register "bmc_boot_timeout" = "60"
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end
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end # ISA bridge: Intel Device a245
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device pci 1f.1 on end # p2sb
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device pci 1f.2 on end # Memory controller: Intel Device a221
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device pci 1f.3 on end # Audio device: Intel Device a270
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device pci 1f.4 on end # Intel C620 Series Chipset Family SMBus
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device pci 1f.5 on end # Intel C620 Series Chipset Family SPI Controller
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end
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end
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