This is only a qualifier between TSEG and ASEG. Change-Id: I8051df92d9014e3574f6e7d5b6f1d6677fe77c82 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34135 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
39 lines
729 B
Plaintext
39 lines
729 B
Plaintext
config CPU_INTEL_MODEL_2065X
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bool
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if CPU_INTEL_MODEL_2065X
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_BOOTBLOCK_X86_32
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select ARCH_VERSTAGE_X86_32
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select ARCH_ROMSTAGE_X86_32
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select ARCH_RAMSTAGE_X86_32
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select SMP
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select SSE2
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select UDELAY_TSC
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select TSC_CONSTANT_RATE
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select TSC_MONOTONIC_TIMER
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select SUPPORT_CPU_UCODE_IN_CBFS
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select PARALLEL_CPU_INIT
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#select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select CPU_INTEL_COMMON
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select NO_FIXED_XIP_ROM_SIZE
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select PARALLEL_MP
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select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
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config BOOTBLOCK_CPU_INIT
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string
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default "cpu/intel/model_2065x/bootblock.c"
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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config SMM_RESERVED_SIZE
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hex
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default 0x100000
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endif
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