97de28da8a
PCI Type 2 config was a strange and never-used config mechanism. It is unlikely that in the 13 years of coreboot's existence that type 2 was ever used; it just made life complicated for everyone. It lived long enough in coreboot to be replaced by mmioconf. Prior to making the device tree visible in romstage we want to get rid of type2. Delete two files we don't need any more (yay!). Replace two functions with one: pci_config_default, which returns a pointer to the default config method. At some future time this may change to mmio but for now it is old type1 style. Change-Id: Icc4ccf379a89bfca8be43f305b68ab45d88bf0ab Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1159 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle <svens@stackframe.org>
234 lines
6.0 KiB
C
234 lines
6.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2001 Ronald G. Minnich
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* Copyright (C) 2005 Nick.Barker9@btinternet.com
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* Copyright (C) 2007-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <string.h>
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#include <console/console.h>
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#include <arch/io.h>
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#include <arch/registers.h>
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#include "x86.h"
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// errors go in AH. Just set these up so that word assigns
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// will work. KISS.
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enum {
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PCIBIOS_SUCCESSFUL = 0x0000,
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PCIBIOS_UNSUPPORTED = 0x8100,
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PCIBIOS_BADVENDOR = 0x8300,
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PCIBIOS_NODEV = 0x8600,
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PCIBIOS_BADREG = 0x8700
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};
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int int10_handler(struct eregs *regs)
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{
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int res=-1;
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static u8 cursor_row=0, cursor_col=0;
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switch((regs->eax & 0xff00)>>8) {
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case 0x01: // Set cursor shape
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res = 0;
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break;
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case 0x02: // Set cursor position
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if (cursor_row != ((regs->edx >> 8) & 0xff) ||
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cursor_col >= (regs->edx & 0xff)) {
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printk(BIOS_INFO, "\n");
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}
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cursor_row = (regs->edx >> 8) & 0xff;
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cursor_col = regs->edx & 0xff;
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res = 0;
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break;
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case 0x03: // Get cursor position
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regs->eax &= 0x00ff;
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regs->ecx = 0x0607;
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regs->edx = (cursor_row << 8) | cursor_col;
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res = 0;
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break;
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case 0x06: // Scroll up
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printk(BIOS_INFO, "\n");
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res = 0;
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break;
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case 0x08: // Get Character and Mode at Cursor Position
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regs->eax = 0x0f00 | 'A'; // White on black 'A'
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res = 0;
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break;
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case 0x09: // Write Character and attribute
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case 0x0e: // Write Character
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printk(BIOS_INFO, "%c", regs->eax & 0xff);
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res = 0;
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break;
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case 0x0f: // Get video mode
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regs->eax = 0x5002; //80x25
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regs->ebx &= 0x00ff;
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res = 0;
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break;
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default:
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printk(BIOS_WARNING, "Unknown INT10 function %04x!\n",
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regs->eax & 0xffff);
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break;
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}
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return res;
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}
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int int12_handler(struct eregs *regs)
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{
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regs->eax = 64 * 1024;
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return 0;
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}
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int int16_handler(struct eregs *regs)
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{
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int res=-1;
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switch((regs->eax & 0xff00)>>8) {
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case 0x00: // Check for Keystroke
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regs->eax = 0x6120; // Space Bar, Space
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res = 0;
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break;
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case 0x01: // Check for Keystroke
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regs->eflags |= 1<<6; // Zero Flag set (no key available)
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res = 0;
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break;
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default:
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printk(BIOS_WARNING, "Unknown INT16 function %04x!\n",
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regs->eax & 0xffff);
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break;
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}
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return res;
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}
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#define PCI_CONFIG_SPACE_TYPE1 (1 << 0)
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#define PCI_SPECIAL_CYCLE_TYPE1 (1 << 4)
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int int1a_handler(struct eregs *regs)
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{
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unsigned short func = (unsigned short)regs->eax;
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int retval = 0;
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unsigned short devid, vendorid, devfn;
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/* Use short to get rid of gabage in upper half of 32-bit register */
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short devindex;
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unsigned char bus;
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struct device *dev;
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u32 dword;
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u16 word;
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u8 byte, reg;
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switch (func) {
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case 0xb101: /* PCIBIOS Check */
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regs->edx = 0x20494350; /* ' ICP' */
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regs->eax &= 0xffff0000; /* Clear AH / AL */
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regs->eax |= PCI_CONFIG_SPACE_TYPE1 | PCI_SPECIAL_CYCLE_TYPE1;
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// last bus in the system. Hard code to 255 for now.
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// dev_enumerate() does not seem to tell us (publically)
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regs->ecx = 0xff;
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regs->edi = 0x00000000; /* protected mode entry */
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retval = 0;
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break;
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case 0xb102: /* Find Device */
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devid = regs->ecx;
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vendorid = regs->edx;
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devindex = regs->esi;
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dev = 0;
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while ((dev = dev_find_device(vendorid, devid, dev))) {
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if (devindex <= 0)
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break;
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devindex--;
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}
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if (dev) {
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unsigned short busdevfn;
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regs->eax &= 0xffff00ff; /* Clear AH */
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regs->eax |= PCIBIOS_SUCCESSFUL;
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// busnum is an unsigned char;
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// devfn is an int, so we mask it off.
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busdevfn = (dev->bus->secondary << 8)
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| (dev->path.pci.devfn & 0xff);
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printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
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regs->ebx = busdevfn;
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retval = 0;
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} else {
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regs->eax &= 0xffff00ff; /* Clear AH */
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regs->eax |= PCIBIOS_NODEV;
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retval = -1;
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}
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break;
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case 0xb10a: /* Read Config Dword */
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case 0xb109: /* Read Config Word */
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case 0xb108: /* Read Config Byte */
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case 0xb10d: /* Write Config Dword */
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case 0xb10c: /* Write Config Word */
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case 0xb10b: /* Write Config Byte */
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devfn = regs->ebx & 0xff;
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bus = regs->ebx >> 8;
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reg = regs->edi;
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dev = dev_find_slot(bus, devfn);
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if (!dev) {
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printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
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// Or are we supposed to return PCIBIOS_NODEV?
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regs->eax &= 0xffff00ff; /* Clear AH */
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regs->eax |= PCIBIOS_BADREG;
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retval = -1;
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return retval;
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}
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switch (func) {
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case 0xb108: /* Read Config Byte */
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byte = pci_read_config8(dev, reg);
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regs->ecx = byte;
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break;
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case 0xb109: /* Read Config Word */
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word = pci_read_config16(dev, reg);
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regs->ecx = word;
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break;
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case 0xb10a: /* Read Config Dword */
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dword = pci_read_config32(dev, reg);
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regs->ecx = dword;
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break;
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case 0xb10b: /* Write Config Byte */
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byte = regs->ecx;
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pci_write_config8(dev, reg, byte);
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break;
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case 0xb10c: /* Write Config Word */
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word = regs->ecx;
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pci_write_config16(dev, reg, word);
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break;
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case 0xb10d: /* Write Config Dword */
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dword = regs->ecx;
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pci_write_config32(dev, reg, dword);
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break;
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}
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#if CONFIG_REALMODE_DEBUG
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printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n",
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func, bus, devfn, reg, regs->ecx);
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#endif
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regs->eax &= 0xffff00ff; /* Clear AH */
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regs->eax |= PCIBIOS_SUCCESSFUL;
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retval = 0;
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break;
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default:
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printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
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regs->eax &= 0xffff00ff; /* Clear AH */
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regs->eax |= PCIBIOS_UNSUPPORTED;
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retval = -1;
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break;
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}
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return retval;
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}
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