9839cbd53f
* integrate vsm init into normal x86.c code (so it can run above 1M) * call void main(unsigned long bist) except void cache_as_ram_main(void) on Geode LX (as we do on almost all other platforms now) * Unify Geode LX MSR setup (will bring most non-working LX targets back to life) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
54 lines
2.1 KiB
C
54 lines
2.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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struct msrinit {
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u32 msrnum;
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msr_t msr;
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};
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static const struct msrinit msr_table[] =
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{
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{CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB.
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* Rom Properties: Write Serialize, WriteProtect.
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* RomBase: 0xFFFC0
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* SysTop to RomBase Properties: Write Serialize, Cache Disable.
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* SysTop: 0x000A0
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* System Memory Properties: (Write Back) */
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{CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */
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{CPU_RCONF_C0_DF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xC0000-0xDFFFF : (Write Back) */
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{CPU_RCONF_E0_FF, {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xE0000-0xFFFFF : (Write Back) */
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/* Setup access to memory under 1MB. Note: VGA hole at 0xA0000-0xBFFFF */
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{MSR_GLIU0_BASE1, {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
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{MSR_GLIU0_BASE2, {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF
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{MSR_GLIU0_SHADOW, {.hi = 0x2000FFFF,.lo = 0xFFFF0003}}, // 0xC0000-0xFFFFF
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{MSR_GLIU1_BASE1, {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
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{MSR_GLIU1_BASE2, {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF
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{MSR_GLIU1_SHADOW, {.hi = 0x2000FFFF,.lo = 0xFFFF0003}}, // 0xC0000-0xFFFFF
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};
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static void msr_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(msr_table); i++)
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wrmsr(msr_table[i].msrnum, msr_table[i].msr);
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}
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