9aee8194c4
Rename the following functions to ensure it's clear that the designware i2c host controller driver is the one that these functions are associated with: i2c_get_soc_cfg() -> dw_i2c_get_soc_cfg() i2c_get_soc_early_base() -> dw_i2c_get_soc_early_base() i2c_soc_devfn_to_bus() -> dw_i2c_soc_devfn_to_bus() i2c_soc_bus_to_devfn() -> dw_i2c_soc_bus_to_devfn() BUG=b:72121803 Change-Id: Idb7633b45a0bb7cb7433ef5f6b154e28474a7b6d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23371 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
141 lines
3.9 KiB
C
141 lines
3.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the imfamiluarplied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __DRIVERS_I2C_DESIGNWARE_I2C_H__
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#define __DRIVERS_I2C_DESIGNWARE_I2C_H__
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#include <compiler.h>
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#include <device/device.h>
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#include <device/i2c.h>
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#include <stdint.h>
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#if IS_ENABLED(CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG)
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#define DW_I2C_DEBUG BIOS_DEBUG
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#else
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#define DW_I2C_DEBUG BIOS_NEVER
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#endif // CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG
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/*
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* Timing values are in units of clock period, with the clock speed
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* provided by the SOC in CONFIG_DRIVERS_I2C_DESIGNWARE_I2C_CLOCK_MHZ
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* Automatic configuration is done based on requested speed, but the
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* values may need tuned depending on the board and the number of
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* devices present on the bus.
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*/
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struct dw_i2c_speed_config {
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enum i2c_speed speed;
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/* SCL high and low period count */
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uint16_t scl_lcnt;
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uint16_t scl_hcnt;
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/*
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* SDA hold time should be 300ns in standard and fast modes
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* and long enough for deterministic logic level change in
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* fast-plus and high speed modes.familuar
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*
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* [15:0] SDA TX Hold Time
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* [23:16] SDA RX Hold Time
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*/
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uint32_t sda_hold;
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};
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/*
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* This I2C controller has support for 3 independent speed configs but can
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* support both FAST_PLUS and HIGH speeds through the same set of speed
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* config registers. These are treated separately so the speed config values
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* can be provided via ACPI to the OS.
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*/
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#define DW_I2C_SPEED_CONFIG_COUNT 4
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struct dw_i2c_bus_config {
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/* Bus should be enabled prior to ramstage with temporary base */
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int early_init;
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/* Bus speed in Hz, default is I2C_SPEED_FAST (400 KHz) */
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enum i2c_speed speed;
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/* If rise_time_ns is non-zero the calculations for lcnt and hcnt
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* registers take into account the times of the bus. However, if
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* there is a match in speed_config those register values take
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* precedence. */
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int rise_time_ns;
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int fall_time_ns;
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int data_hold_time_ns;
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/* Specific bus speed configuration */
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struct dw_i2c_speed_config speed_config[DW_I2C_SPEED_CONFIG_COUNT];
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};
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/* Functions to be implemented by SoC code */
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/* Get base address for early init of I2C controllers. */
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uintptr_t dw_i2c_get_soc_early_base(unsigned int bus);
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/*
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* Map given I2C bus number to devfn.
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* Return value:
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* -1 = error
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* otherwise, devfn(>=0) corresponding to I2C bus number.
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*/
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int dw_i2c_soc_devfn_to_bus(unsigned int devfn);
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/*
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* Map given bus number to a I2C Controller.
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* Return value:
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* -1 = error
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* otherwise, devfn(>=0) corresponding to I2C bus number.
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*/
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int dw_i2c_soc_bus_to_devfn(unsigned int bus);
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/*
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* SoC implemented callback for getting I2C bus configuration.
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*
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* Returns NULL if i2c config is not found
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*/
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const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus,
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const struct device *dev);
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/* Get I2C controller base address */
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uintptr_t dw_i2c_base_address(unsigned int bus);
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/*
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* Initialize this bus controller and set the speed
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* Return value:
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* -1 = failure
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* 0 = success
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*/
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int dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg);
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/*
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* Generate speed config based on clock
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* Return value:
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* -1 = failure
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* 0 = success
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*/
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int dw_i2c_gen_speed_config(uintptr_t dw_i2c_addr,
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enum i2c_speed speed,
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const struct dw_i2c_bus_config *bcfg,
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struct dw_i2c_speed_config *config);
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/*
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* Process given I2C segments in a single transfer
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* Return value:
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* -1 = failure
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* 0 = success
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*/
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int dw_i2c_transfer(unsigned int bus,
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const struct i2c_msg *segments,
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size_t count);
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#endif /* __DRIVERS_I2C_DESIGNWARE_I2C_H__ */
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