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system76-coreboot/src
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Felix Held 9bc16ed856 soc/amd/picasso/aoac: fix typo in comment 
The power_off_aoac_device function clears the FCH_AOAC_PWR_ON_DEV bit,
so the comment should be that it powers off the devices.

Change-Id: Ia5e5d80b1977c3f53fcd9cf6d48bdb59045dfc3c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48155
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-12-01 18:07:33 +00:00
..
acpi
ACPI: Define acpi_get_preferred_pm_profile()
2020-11-19 22:58:41 +00:00
arch
arch/x86/smbios: Update SMBIOS type 16 error correction type
2020-11-25 09:18:04 +00:00
commonlib
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
console
console: Override uart base address
2020-11-09 07:46:10 +00:00
cpu
cpu/x86/early_reset: Mark assemblycode as 32bit
2020-12-01 16:00:40 +00:00
device
device: Drop unused HyperTransport code
2020-11-25 09:11:46 +00:00
drivers
drivers/aspeed/common/ast: Fix compilation under x86_64
2020-12-01 16:01:31 +00:00
ec
ec/google/chromeec/acpi: Make OperationRegion brace align
2020-12-01 08:00:23 +00:00
include
include/device/pci_ids.h: Fix device id for gspi2
2020-11-30 08:07:00 +00:00
lib
lib/reg_script: Add cast to fix compilation on x86_64
2020-12-01 16:00:57 +00:00
mainboard
mb/intel/jslrvp: Modify the flash layout for fsp debug build
2020-12-01 15:27:01 +00:00
northbridge
nb/amd: Deduplicate nb_common.h
2020-11-25 09:11:58 +00:00
security
cbfs: Add metadata cache
2020-11-21 10:43:53 +00:00
soc
soc/amd/picasso/aoac: fix typo in comment
2020-12-01 18:07:33 +00:00
southbridge
soc/amd/common: introduce SOC_AMD_COMMON_BLOCK_PCI_MMCONF
2020-11-30 16:27:52 +00:00
superio
superio/smsc/sio1036: Support 16-bit IO port addressing
2020-11-18 13:12:11 +00:00
vendorcode
vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1483_11
2020-11-26 18:10:47 +00:00
Kconfig
soc/intel/xeon_sp: Move function debug macros
2020-10-29 16:44:19 +00:00