9d9518ff54
pci_write_config8. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include "cs5536.h"
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#define IDE_CFG 0x40
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#define CHANEN (1L << 1)
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#define PWB (1L << 14)
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#define CABLE (1L << 16)
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#define IDE_DTC 0x48
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#define IDE_CAST 0x4C
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#define IDE_ETC 0x50
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static void ide_init(struct device *dev)
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{
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uint32_t ide_cfg;
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printk_spew("cs5536_ide: %s\n", __FUNCTION__);
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/* GPIO and IRQ setup are handled in the main chipset code. */
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// Enable the channel and Post Write Buffer
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// NOTE: Only 32-bit writes to the data buffer are allowed when PWB is set
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ide_cfg = pci_read_config32(dev, IDE_CFG);
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ide_cfg |= CHANEN | PWB;
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pci_write_config32(dev, IDE_CFG, ide_cfg);
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}
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static void ide_enable(struct device *dev)
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{
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printk_spew("cs5536_ide: %s\n", __FUNCTION__);
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}
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static struct device_operations ide_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = ide_init,
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.enable = 0,
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};
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static const struct pci_driver ide_driver __pci_driver = {
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.ops = &ide_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.device = PCI_DEVICE_ID_AMD_CS5536_B0_IDE,
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};
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