a02bb653fd
The previous usage of the intel microcode support supported using the library under ROMCC and ramstage. Allow for microcode support to be used in normal C-based romstage as well by: 1. Only using walkcbfs when ROMCC is defined. 2. Only using spinlocks if !__PRE_RAM__ The header file now unconditionally exposes the declarations of the supporting functions. Change-Id: I903578bcb4422b4c050903c53b60372b64b79af1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13611 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
7 lines
406 B
Makefile
7 lines
406 B
Makefile
################################################################################
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## One small file with the awesome super-power of updating the cpu microcode
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## directly from CBFS. You have been WARNED!!!
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################################################################################
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ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
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romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
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