a0c68f864e
* Don't implicitly add __PRE_RAM__ in romcc. Fixes intel/xe7501devkit Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
48 lines
985 B
C
48 lines
985 B
C
#define ASSEMBLY 1
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#define __PRE_RAM__
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include <arch/romcc_io.h>
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#include <cpu/x86/lapic.h>
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#include "pc80/serial.c"
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#include "arch/i386/lib/console.c"
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#include "pc80/mc146818rtc_early.c"
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#include "cpu/x86/lapic/boot_cpu.c"
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#include "northbridge/intel/e7525/memory_initialized.c"
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static unsigned long main(unsigned long bist)
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{
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/* Did just the cpu reset? */
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if (memory_initialized()) {
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if (last_boot_normal()) {
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goto normal_image;
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} else {
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goto cpu_reset;
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}
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}
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/* This is the primary cpu how should I boot? */
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else if (do_normal_boot()) {
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goto normal_image;
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}
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else {
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goto fallback_image;
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}
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normal_image:
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asm volatile ("jmp __normal_image"
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: /* outputs */
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: "a" (bist) /* inputs */
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: /* clobbers */
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);
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cpu_reset:
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asm volatile ("jmp __cpu_reset"
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: /* outputs */
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: "a"(bist) /* inputs */
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: /* clobbers */
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);
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fallback_image:
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return bist;
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}
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