a24c81cd30
Gru/Kevin use 933 MHz (actually 928 MHz for better jitter) as max sdram frequency, while bob uses 800 MHz. It's normal some variants can't meet 928 MHz SI requirement and hence have to use a lower freq as spec. BUG=chrome-os-partner:61001 BRANCH=gru TEST=check dpll is 800 MHz on bob Change-Id: I6d19a351f25d1f48547715ce57c3a87d9505f6f1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 8176bfea52422c713f144ffec419752aeca66db2 Original-Change-Id: I46afba8d091f1489feeb20cafc44decaa81601fc Original-Signed-off-by: Caesar Wang <wxt@rock-chips.com> Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/420208 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Shasha Zhao <Sarah_Zhao@asus.com> Original-Tested-by: Shasha Zhao <Sarah_Zhao@asus.com> Original-(cherry picked from commit eba5dff79eeedae5ff608d2d8d297ccf9c13cb55) Original-Reviewed-on: https://chromium-review.googlesource.com/448277 Original-Reviewed-by: Derek Basehore <dbasehore@chromium.org> Reviewed-on: https://review.coreboot.org/18581 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
110 lines
2.7 KiB
Plaintext
110 lines
2.7 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright 2016 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config BOARD_GOOGLE_GRU_COMMON # Umbrella option to be selected by variant boards.
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def_bool n
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if BOARD_GOOGLE_GRU_COMMON
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# Most Grus have TPM2 but later Kevins don't... decide this in one place for
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# convenience. Explicitly override it when building for earlier Kevins.
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config GRU_HAS_TPM2
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bool "Build for a board revision with a SPI TPM 2.0"
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default n if BOARD_GOOGLE_KEVIN
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default y
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ID_AUTO
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select BOARD_ROMSIZE_KB_8192
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select COMMON_CBFS_SPI_WRAPPER
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_RTC
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select EC_GOOGLE_CHROMEEC_SPI
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select HAVE_HARD_RESET
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select MAINBOARD_DO_NATIVE_VGA_INIT
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_TPM2 if GRU_HAS_TPM2
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select RAM_CODE_SUPPORT
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select RTC
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select SOC_ROCKCHIP_RK3399
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select SPI_FLASH
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select SPI_FLASH_GIGADEVICE
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select SPI_FLASH_WINBOND
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config CHROMEOS
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select EC_GOOGLE_CHROMEEC_SWITCHES
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select EC_SOFTWARE_SYNC
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select SPI_TPM if GRU_HAS_TPM2
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select VBOOT_VBNV_FLASH
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select VIRTUAL_DEV_SWITCH
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config MAINBOARD_DIR
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string
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default google/gru
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config MAINBOARD_VENDOR
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string
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default "Google"
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config EC_GOOGLE_CHROMEEC_SPI_BUS
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hex
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default 0x5
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config BOOT_DEVICE_SPI_FLASH_BUS
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int
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default 1
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x0
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config DRIVER_TPM_I2C_ADDR
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hex
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default 0x20
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config CONSOLE_SERIAL_UART_ADDRESS
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hex
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depends on DRIVERS_UART
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default 0xFF1A0000
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##########################################################
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#### Update below when adding a new derivative board. ####
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##########################################################
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config MAINBOARD_PART_NUMBER
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string
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default "Scarlet" if BOARD_GOOGLE_SCARLET
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default "Bob" if BOARD_GOOGLE_BOB
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default "Gru" if BOARD_GOOGLE_GRU
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default "Kevin" if BOARD_GOOGLE_KEVIN
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# The default max sdram freq is 933M(actually 928M dpll), and
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# 800M is another choice.
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config MAX_SDRAM_FREQ
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int
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default 800 if BOARD_GOOGLE_BOB
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default 933
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config GBB_HWID
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string
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depends on CHROMEOS
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default "SCARLET TEST 7598" if BOARD_GOOGLE_SCARLET
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default "BOB TEST 7422" if BOARD_GOOGLE_BOB
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default "GRU TEST 5431" if BOARD_GOOGLE_GRU
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default "KEVIN TEST 1422" if BOARD_GOOGLE_KEVIN
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endif # BOARD_GOOGLE_GRU_COMMON
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