a257efcfcc
Change-Id: I9cb63ff58900a39d7cd8e3da2b9a9a95c2a41a69 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21484 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
106 lines
3.0 KiB
C
106 lines
3.0 KiB
C
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright (C) 2012 Advanced Micro Devices, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; version 2 of the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <northbridge/amd/pi/agesawrapper.h>
|
|
|
|
|
|
static const PCIe_PORT_DESCRIPTOR PortList [] = {
|
|
/* Initialize Port descriptor (PCIe port, Lanes 2-3, PCI Device 2, Function 4) */
|
|
{
|
|
0,
|
|
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 2, 3),
|
|
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 4,
|
|
HotplugDisabled,
|
|
PcieGenMaxSupported,
|
|
PcieGenMaxSupported,
|
|
AspmDisabled, 0x02, 0)
|
|
},
|
|
/* Initialize Port descriptor (PCIe port, Lane 1, PCI Device 2, Function 3) */
|
|
{
|
|
0,
|
|
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 1, 1),
|
|
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 3,
|
|
HotplugDisabled,
|
|
PcieGenMaxSupported,
|
|
PcieGenMaxSupported,
|
|
AspmDisabled, 0x03, 0)
|
|
},
|
|
/* Initialize Port descriptor (PCIe port, Lane 0, PCI Device 2, Function 2) */
|
|
{
|
|
0,
|
|
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 0),
|
|
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 2,
|
|
HotplugDisabled,
|
|
PcieGenMaxSupported,
|
|
PcieGenMaxSupported,
|
|
AspmDisabled, 0x04, 0)
|
|
},
|
|
/* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device 2, Function 1) */
|
|
{
|
|
DESCRIPTOR_TERMINATE_LIST,
|
|
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 7),
|
|
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 1,
|
|
HotplugDisabled,
|
|
PcieGenMaxSupported,
|
|
PcieGenMaxSupported,
|
|
AspmDisabled, 0x05, 0)
|
|
}
|
|
};
|
|
|
|
static const PCIe_DDI_DESCRIPTOR DdiList [] = {
|
|
/* eDP0 to LVDS connector */
|
|
{
|
|
0,
|
|
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 11),
|
|
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
|
|
},
|
|
/* DP1 to HDMI */
|
|
{
|
|
DESCRIPTOR_TERMINATE_LIST,
|
|
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 12, 15),
|
|
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2)
|
|
},
|
|
};
|
|
|
|
static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
|
|
.Flags = DESCRIPTOR_TERMINATE_LIST,
|
|
.SocketId = 0,
|
|
.PciePortList = PortList,
|
|
.DdiLinkList = DdiList
|
|
};
|
|
|
|
/*---------------------------------------------------------------------------------------*/
|
|
/**
|
|
* OemCustomizeInitEarly
|
|
*
|
|
* Description:
|
|
* This stub function will call the host environment through the binary block
|
|
* interface (call-out port) to provide a user hook opportunity
|
|
*
|
|
* Parameters:
|
|
* @param[in] *InitEarly
|
|
*
|
|
* @retval VOID
|
|
*
|
|
**/
|
|
/*---------------------------------------------------------------------------------------*/
|
|
VOID
|
|
OemCustomizeInitEarly (
|
|
IN OUT AMD_EARLY_PARAMS *InitEarly
|
|
)
|
|
{
|
|
InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
|
|
}
|