a47bd91cca
intel_irq_routing_table is a local structure that should not be used globally, because it might not be there on all mainboards. Instead, the API has to be corrected to allow passing a PIRQ table in where needed. Change-Id: Icf08928b67727a366639b648bf6aac8e1a87e765 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1862 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
61 lines
2.1 KiB
C
61 lines
2.1 KiB
C
#include <arch/pirq_routing.h>
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#include <device/pci.h>
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#define IRQ_ROUTER_BUS 0
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#define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3)
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#define IRQ_ROUTER_VENDOR 0x1022
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#define IRQ_ROUTER_DEVICE 0x746b
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#define AVAILABLE_IRQS 0xdef8
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#define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
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{ bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
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{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
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/* Each IRQ_SLOT entry consists of:
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* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
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*/
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static const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT table entries */
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IRQ_ROUTER_BUS, /* Where the interrupt router lies (bus) */
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IRQ_ROUTER_DEVFN, /* Where the interrupt router lies (dev) */
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0x00, /* IRQs devoted exclusively to PCI usage */
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IRQ_ROUTER_VENDOR, /* Vendor */
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IRQ_ROUTER_DEVICE, /* Device */
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0x00, /* Miniport data */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x34, /* u8 checksum , mod 256 checksum must give zero */
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{ /* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
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/* Northbridge, Node 0 */
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IRQ_SLOT(0x0, 0x00,0x18,0x0, 0,0,0,0),
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/* AMD-8131 PCI-X Bridge */
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IRQ_SLOT(0x0, 0x01,0x01,0x0, 0,0,0,0),
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/* Onboard LSI SCSI Controller */
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IRQ_SLOT(0x0, 0x02,0x02,0x0, 3,0,0,0),
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/* Onboard Broadcom NICs */
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IRQ_SLOT(0x0, 0x02,0x01,0x0, 1,2,0,0),
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/* AMD-8131 PCI-X Bridge */
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IRQ_SLOT(0x0, 0x01,0x02,0x0, 0,0,0,0),
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/* PCI Slot 1-2 */
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IRQ_SLOT(0x1, 0x03,0x03,0x0, 1,2,3,4),
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IRQ_SLOT(0x2, 0x03,0x04,0x0, 2,3,4,1),
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/* AMD-8111 PCI Bridge */
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IRQ_SLOT(0x0, 0x01,0x03,0x0, 0,0,0,0),
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/* USB Controller */
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IRQ_SLOT(0x0, 0x04,0x00,0x0, 0,0,0,4),
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/* ATI Rage XL VGA */
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IRQ_SLOT(0x0, 0x04,0x05,0x0, 1,0,0,0),
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/* AMD-8111 LPC Dridge */
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IRQ_SLOT(0x0, 0x01,0x04,0x0, 0,0,0,0),
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/* Northbridge, Node 1 */
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IRQ_SLOT(0x0, 0x00,0x19,0x0, 0,0,0,0),
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}
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};
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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return copy_pirq_routing_table(addr, &intel_irq_routing_table);
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}
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