Since the HD audio controller in the PCH are always on the same device functions, the device operations can be statically assigned in the devicetree and there's no need to bind the host bridge device operations to the PCI device during runtime via a list of PCI IDs. TEST=Lenovo X220 still boots to Linux and audio still works Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com> Change-Id: I9bbbe9f4490dc6fb21174d63d1c8906d69ea3ee0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79118 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
48 lines
2.4 KiB
Plaintext
48 lines
2.4 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/intel/sandybridge
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chip cpu/intel/model_206ax
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device cpu_cluster 0 on ops sandybridge_cpu_bus_ops end
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register "acpi_c1" = "CPU_ACPI_C1"
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register "acpi_c2" = "CPU_ACPI_C3"
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register "acpi_c3" = "CPU_ACPI_C7"
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end
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device domain 0 on
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ops sandybridge_pci_domain_ops
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device pci 00.0 alias host_bridge on ops sandybridge_host_bridge_ops end
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device pci 01.0 alias peg10 off end # PEG10
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device pci 01.1 alias peg11 off end # PEG11
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device pci 01.2 alias peg12 off end # PEG12
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device pci 02.0 alias igd off ops sandybridge_gma_func0_ops end # vga controller
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device pci 04.0 alias dev4 off end # Device 4
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device pci 06.0 alias peg60 off end # PEG60
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chip southbridge/intel/bd82x6x # Intel Series 6/7 PCH
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device pci 14.0 alias xhci off end # USB 3.0 Controller (only on 7 series)
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device pci 16.0 alias mei1 on end # Management Engine Interface 1
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device pci 16.1 alias mei2 off end # Management Engine Interface 2
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device pci 16.2 alias me_ide_r off end # Management Engine IDE-R
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device pci 16.3 alias me_kt off end # Management Engine KT
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device pci 19.0 alias gbe off end # Intel Gigabit Ethernet
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device pci 1a.0 alias ehci2 off end # USB2 EHCI #2
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device pci 1b.0 alias hda off ops bd82x6x_azalia_ops end # High Definition Audio
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device pci 1c.0 alias pcie_rp1 off ops bd82x6x_pcie_rp_ops end # PCIe Port #1
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device pci 1c.1 alias pcie_rp2 off ops bd82x6x_pcie_rp_ops end # PCIe Port #2
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device pci 1c.2 alias pcie_rp3 off ops bd82x6x_pcie_rp_ops end # PCIe Port #3
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device pci 1c.3 alias pcie_rp4 off ops bd82x6x_pcie_rp_ops end # PCIe Port #4
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device pci 1c.4 alias pcie_rp5 off ops bd82x6x_pcie_rp_ops end # PCIe Port #5
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device pci 1c.5 alias pcie_rp6 off ops bd82x6x_pcie_rp_ops end # PCIe Port #6
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device pci 1c.6 alias pcie_rp7 off ops bd82x6x_pcie_rp_ops end # PCIe Port #7
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device pci 1c.7 alias pcie_rp8 off ops bd82x6x_pcie_rp_ops end # PCIe Port #8
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device pci 1d.0 alias ehci1 off end # USB2 EHCI #1
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device pci 1e.0 alias pci_bridge off end # PCI bridge
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device pci 1f.0 alias lpc on end # LPC bridge
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device pci 1f.2 alias sata1 off end # SATA Controller 1
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device pci 1f.3 alias smbus on end # SMBus
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device pci 1f.5 alias sata2 off end # SATA Controller 2
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device pci 1f.6 alias thermal off end # Thermal
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end
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end
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end
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