a6151f4bfb
Enable first SATA port in Rambi device tree. BUG=chrome-os-partner:23643 TEST=TEST=Manual, in dev mode. Verify on rambi that SATA disk is detected, and kernel is found + booted. Change-Id: Ic0cb5f9ff17ca0f6cc7941f203b9338df200811d Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174916 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4914 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
45 lines
1.3 KiB
Plaintext
45 lines
1.3 KiB
Plaintext
chip soc/intel/baytrail
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# SATA port enable mask (2 ports)
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register "sata_port_map" = "0x1"
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register "sata_ahci" = "0x1"
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register "ide_legacy_combined" = "0x0"
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device cpu_cluster 0 on
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device lapic 0 on end
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end
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device domain 0 on
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device pci 00.0 on end # SoC router
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device pci 02.0 on end # GFX
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device pci 11.0 off end # SDIO
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device pci 12.0 on end # SD
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device pci 13.0 on end # SATA
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device pci 14.0 on end # XHCI
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device pci 15.0 on end # LPE
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device pci 17.0 on end # MMC
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device pci 18.0 on end # SIO_DMA1
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device pci 18.1 on end # I2C1
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device pci 18.2 on end # I2C2
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device pci 18.3 off end # I2C3
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device pci 18.4 off end # I2C4
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device pci 18.5 on end # I2C5
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device pci 18.6 on end # I2C6
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.2 off end # PCIE_PORT3
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device pci 1c.3 off end # PCIE_PORT4
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device pci 1d.0 on end # EHCI
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device pci 1e.0 on end # SIO_DMA2
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device pci 1e.1 off end # PWM1
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device pci 1e.2 off end # PWM2
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device pci 1e.3 off end # HSUART1
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device pci 1e.4 on end # HSUART2
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device pci 1e.5 on end # SPI
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device pci 1f.0 on end # LPC Bridge
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device pci 1f.3 off end # SMBus
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end
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end
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