a71bdc3181
Change-Id: I80b7facfb9cc9f642dd1c766884dc23da1aab2c8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6800 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013, 2014 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 or (at your option)
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* any later version of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/device.h>
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#include <string.h>
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#include <device/pci_rom.h>
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#include "i915.h"
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#include "intel_bios.h"
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static size_t generate_vbt(const struct i915_gpu_controller_info *conf,
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void *vbt, const char *idstr)
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{
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struct vbt_header *head = vbt;
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struct bdb_header *bdb_head;
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struct bdb_general_features *genfeat;
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u8 *ptr;
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memset (head, 0, sizeof (*head));
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memcpy (head->signature, idstr, 20);
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head->version = 100;
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head->header_size = sizeof (*head);
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head->bdb_offset = sizeof (*head);
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bdb_head = (struct bdb_header *) (head + 1);
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memset (bdb_head, 0, sizeof (*bdb_head));
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memcpy (bdb_head->signature, "BIOS_DATA_BLOCK ", 16);
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bdb_head->version = 0xa8;
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bdb_head->header_size = sizeof (*bdb_head);
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ptr = (u8 *) (bdb_head + 1);
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ptr[0] = BDB_GENERAL_FEATURES;
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ptr[1] = sizeof (*genfeat);
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ptr[2] = sizeof (*genfeat) >> 8;
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ptr += 3;
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genfeat = (struct bdb_general_features *) ptr;
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memset (genfeat, 0, sizeof (*genfeat));
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genfeat->panel_fitting = 3;
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genfeat->flexaim = 1;
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genfeat->download_ext_vbt = 1;
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genfeat->enable_ssc = conf->use_spread_spectrum_clock;
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genfeat->ssc_freq = !conf->link_frequency_270_mhz;
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genfeat->rsvd10 = 0x4;
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genfeat->legacy_monitor_detect = 1;
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genfeat->int_crt_support = 1;
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genfeat->dp_ssc_enb = 1;
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ptr += sizeof (*genfeat);
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bdb_head->bdb_size = ptr - (u8 *)bdb_head;
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head->vbt_size = ptr - (u8 *)head;
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head->vbt_checksum = 0;
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return ptr - (u8 *)head;
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}
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void
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generate_fake_intel_oprom(const struct i915_gpu_controller_info *conf,
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struct device *dev, const char *idstr)
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{
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optionrom_header_t *oh = (void *)PCI_VGA_RAM_IMAGE_START;
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optionrom_pcir_t *pcir;
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size_t vbt_size;
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size_t fake_oprom_size;
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memset(oh, 0, 8192);
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oh->signature = PCI_ROM_HDR;
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oh->pcir_offset = 0x40;
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oh->vbt_offset = 0x80;
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pcir = (void *)(PCI_VGA_RAM_IMAGE_START + 0x40);
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pcir->signature = 0x52494350; // PCIR
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pcir->vendor = dev->vendor;
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pcir->device = dev->device;
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pcir->length = sizeof(*pcir);
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pcir->revision = dev->class;
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pcir->classcode[0] = dev->class >> 8;
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pcir->classcode[1] = dev->class >> 16;
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pcir->classcode[2] = dev->class >> 24;
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pcir->indicator = 0x80;
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vbt_size = generate_vbt (conf, (void *)(PCI_VGA_RAM_IMAGE_START + 0x80), idstr);
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fake_oprom_size = (0x80 + vbt_size + 511) / 512;
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oh->size = fake_oprom_size;
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pcir->imagelength = fake_oprom_size;
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}
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