a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _X86_MP_H_
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#define _X86_MP_H_
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#include <arch/smp/atomic.h>
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#define CACHELINE_SIZE 64
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struct cpu_info;
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struct bus;
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static inline void mfence(void)
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{
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__asm__ __volatile__("mfence\t\n": : :"memory");
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}
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typedef void (*mp_callback_t)(void *arg);
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/*
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* A mp_flight_record details a sequence of calls for the APs to perform
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* along with the BSP to coordinate sequencing. Each flight record either
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* provides a barrier for each AP before calling the callback or the APs
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* are allowed to perform the callback without waiting. Regardless, each
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* record has the cpus_entered field incremented for each record. When
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* the BSP observes that the cpus_entered matches the number of APs
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* the bsp_call is called with bsp_arg and upon returning releases the
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* barrier allowing the APs to make further progress.
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*
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* Note that ap_call() and bsp_call() can be NULL. In the NULL case the
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* callback will just not be called.
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*/
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struct mp_flight_record {
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atomic_t barrier;
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atomic_t cpus_entered;
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mp_callback_t ap_call;
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void *ap_arg;
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mp_callback_t bsp_call;
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void *bsp_arg;
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} __attribute__((aligned(CACHELINE_SIZE)));
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#define _MP_FLIGHT_RECORD(barrier_, ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
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{ \
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.barrier = ATOMIC_INIT(barrier_), \
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.cpus_entered = ATOMIC_INIT(0), \
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.ap_call = ap_func_, \
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.ap_arg = ap_arg_, \
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.bsp_call = bsp_func_, \
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.bsp_arg = bsp_arg_, \
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}
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#define MP_FR_BLOCK_APS(ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
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_MP_FLIGHT_RECORD(0, ap_func_, ap_arg_, bsp_func_, bsp_arg_)
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#define MP_FR_NOBLOCK_APS(ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
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_MP_FLIGHT_RECORD(1, ap_func_, ap_arg_, bsp_func_, bsp_arg_)
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/* The mp_params structure provides the arguments to the mp subsystem
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* for bringing up APs. */
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struct mp_params {
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int num_cpus; /* Total cpus include BSP */
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int parallel_microcode_load;
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const void *microcode_pointer;
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/* adjust_apic_id() is called for every potential apic id in the
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* system up from 0 to CONFIG_MAX_CPUS. Return adjusted apic_id. */
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int (*adjust_apic_id)(int index, int apic_id);
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/* Flight plan for APs and BSP. */
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struct mp_flight_record *flight_plan;
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int num_records;
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};
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/*
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* mp_init() will set up the SIPI vector and bring up the APs according to
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* mp_params. Each flight record will be executed according to the plan. Note
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* that the MP infrastructure uses SMM default area without saving it. It's
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* up to the chipset or mainboard to either e820 reserve this area or save this
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* region prior to calling mp_init() and restoring it after mp_init returns.
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*
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* At the time mp_init() is called the MTRR MSRs are mirrored into APs then
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* caching is enabled before running the flight plan.
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*
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* The MP initialization has the following properties:
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* 1. APs are brought up in parallel.
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* 2. The ordering of coreboot cpu number and APIC ids is not deterministic.
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* Therefore, one cannot rely on this property or the order of devices in
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* the device tree unless the chipset or mainboard know the APIC ids
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* a priori.
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*
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* mp_init() returns < 0 on error, 0 on success.
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*/
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int mp_init(struct bus *cpu_bus, struct mp_params *params);
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/*
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* Useful functions to use in flight records when sequencing APs.
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*/
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/* Calls cpu_initialize(info->index) which calls the coreboot CPU drivers. */
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void mp_initialize_cpu(void *unused);
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/* Returns apic id for coreboot cpu number or < 0 on failure. */
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int mp_get_apic_id(int cpu_slot);
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/*
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* SMM helpers to use with initializing CPUs.
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*/
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/* Send SMI to self without any serialization. */
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void smm_initiate_relocation_parallel(void);
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/* Send SMI to self with single execution. */
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void smm_initiate_relocation(void);
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#endif /* _X86_MP_H_ */
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