a8e1168064
be required for a series of later patches. Roughly it contains: * fixed SMBus driver (was not compiled in before) * fixed S-ATA/P-ATA combination * Added warnings to drivers being called with a NULL dev->chip_info * Set subsystem ids for those boards that have none specified in Options.lb * Fix license headers. The code was originally released under GPL v2 but some files sneaked in with a v2 or later header. * some attempts to fix azalia/Intel HDA.. not working yet * clean up and fix pci bridge handling code * Add Config based GPI handling to LPC driver * Add HPET enable function * Enable clock gating where appropriate * first attempt at USB debug console support (not working yet) * Add required options to kontron board * many other minor changes Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
97 lines
2.8 KiB
C
97 lines
2.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include "i82801gx.h"
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static void usb_init(struct device *dev)
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{
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u32 reg32;
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u8 reg8;
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/* USB Specification says the device must be Bus Master */
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printk_debug("UHCI: Setting up controller.. ");
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reg32 = pci_read_config32(dev, PCI_COMMAND);
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pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
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reg8 = pci_read_config8(dev, 0xca);
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reg8 |= (1 << 0);
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pci_write_config8(dev, 0xca, reg8);
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printk_debug("done.\n");
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}
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static void usb_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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{
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if (!vendor || !device) {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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pci_read_config32(dev, PCI_VENDOR_ID));
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} else {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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}
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static struct pci_operations usb_pci_ops = {
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.set_subsystem = usb_set_subsystem,
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};
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static struct device_operations usb_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = usb_init,
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.scan_bus = 0,
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.enable = i82801gx_enable,
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.ops_pci = &usb_pci_ops,
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};
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/* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
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static const struct pci_driver i82801gb_usb1 __pci_driver = {
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.ops = &usb_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27c8,
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};
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/* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
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static const struct pci_driver i82801gb_usb2 __pci_driver = {
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.ops = &usb_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27c9,
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};
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/* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
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static const struct pci_driver i82801gb_usb3 __pci_driver = {
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.ops = &usb_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27ca,
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};
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/* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
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static const struct pci_driver i82801gb_usb4 __pci_driver = {
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.ops = &usb_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27cb,
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};
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