Files
system76-coreboot/src/soc/amd/common/acpi/dptc.asl
Tim Van Patten a90aebbf2a soc/amd/acpi: Add low/no battery mode to DPTC
Update acpigen_write_alib_dptc() to support "low/no battery mode",
which throttles the SOC when there is no battery connected or the
battery charge is critically low.

This is in preparation for enabling this functionality for Mendocino.

BUG=b:217911928
TEST=Build zork
TEST=Boot nipperkin
TEST=Boot skyrim

Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66804
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-19 09:53:17 +00:00

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/* SPDX-License-Identifier: GPL-2.0-only */
External(\_SB.DDEF, MethodObj)
External(\_SB.DTHL, MethodObj)
External(\_SB.DTAB, MethodObj)
Scope (\_SB)
{
Method (DPTC, 0, Serialized)
{
/* If _SB.DDEF is not present, DPTC is not enabled so return early. */
If (!CondRefOf (\_SB.DDEF))
{
Return (Zero)
}
/* If _SB.DTHL is not present, then DPTC Tablet Mode is not enabled.
* Throttle the SOC if the battery is not present (BTEX), the battery level is critical
* (BFCR), or the battery is cutoff (BFCT). */
If (CondRefOf (\_SB.DTHL) &&
(!\_SB.PCI0.LPCB.EC0.BTEX || \_SB.PCI0.LPCB.EC0.BFCR || \_SB.PCI0.LPCB.EC0.BFCT))
{
\_SB.DTHL()
Return (Zero)
}
/* If _SB.DTAB is not present, then DPTC Tablet Mode is not enabled. */
If (CondRefOf (\_SB.DTAB) && (\_SB.PCI0.LPCB.EC0.TBMD == One))
{
\_SB.DTAB()
Return (Zero)
}
\_SB.DDEF()
Return (Zero)
}
}