2f25d9963e
We moved to using __ASSEMBLER__ years ago since it is set by as. Change-Id: I60103ba23ebe87be1d0bc63beed0ef5b05eed4f2 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2111 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
171 lines
4.3 KiB
C
171 lines
4.3 KiB
C
/*
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* (C) Copyright 2012 SAMSUNG Electronics
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* Abhilash Kesavan <a.kesavan@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARCH_COMMON_MSHC_H
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#define __ASM_ARCH_COMMON_MSHC_H
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#include <asm/arch/pinmux.h>
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#ifndef __ASSEMBLER__
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struct mshci_host {
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struct s5p_mshci *reg; /* Mapped address */
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unsigned int clock; /* Current clock in MHz */
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enum periph_id peripheral;
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};
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struct s5p_mshci {
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unsigned int ctrl;
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unsigned int pwren;
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unsigned int clkdiv;
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unsigned int clksrc;
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unsigned int clkena;
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unsigned int tmout;
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unsigned int ctype;
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unsigned int blksiz;
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unsigned int bytcnt;
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unsigned int intmask;
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unsigned int cmdarg;
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unsigned int cmd;
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unsigned int resp0;
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unsigned int resp1;
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unsigned int resp2;
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unsigned int resp3;
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unsigned int mintsts;
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unsigned int rintsts;
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unsigned int status;
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unsigned int fifoth;
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unsigned int cdetect;
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unsigned int wrtprt;
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unsigned int gpio;
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unsigned int tcbcnt;
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unsigned int tbbcnt;
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unsigned int debnce;
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unsigned int usrid;
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unsigned int verid;
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unsigned int hcon;
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unsigned int uhs_reg;
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unsigned int rst_n;
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unsigned char reserved1[4];
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unsigned int bmod;
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unsigned int pldmnd;
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unsigned int dbaddr;
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unsigned int idsts;
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unsigned int idinten;
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unsigned int dscaddr;
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unsigned int bufaddr;
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unsigned int clksel;
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unsigned char reserved2[460];
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unsigned int cardthrctl;
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};
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/*
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* Struct idma
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* Holds the descriptor list
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*/
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struct mshci_idmac {
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u32 des0;
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u32 des1;
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u32 des2;
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u32 des3;
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};
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/* Control Register Register */
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#define CTRL_RESET (0x1 << 0)
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#define FIFO_RESET (0x1 << 1)
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#define DMA_RESET (0x1 << 2)
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#define DMA_ENABLE (0x1 << 5)
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#define SEND_AS_CCSD (0x1 << 10)
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#define ENABLE_IDMAC (0x1 << 25)
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/* Power Enable Register */
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#define POWER_ENABLE (0x1 << 0)
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/* Clock Enable Register */
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#define CLK_ENABLE (0x1 << 0)
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#define CLK_DISABLE (0x0 << 0)
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/* Timeout Register */
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#define TMOUT_MAX 0xffffffff
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/* Card Type Register */
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#define PORT0_CARD_WIDTH1 0
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#define PORT0_CARD_WIDTH4 (0x1 << 0)
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#define PORT0_CARD_WIDTH8 (0x1 << 16)
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/* Interrupt Mask Register */
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#define INTMSK_ALL 0xffffffff
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#define INTMSK_RE (0x1 << 1)
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#define INTMSK_CDONE (0x1 << 2)
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#define INTMSK_DTO (0x1 << 3)
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#define INTMSK_DCRC (0x1 << 7)
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#define INTMSK_RTO (0x1 << 8)
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#define INTMSK_DRTO (0x1 << 9)
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#define INTMSK_HTO (0x1 << 10)
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#define INTMSK_FRUN (0x1 << 11)
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#define INTMSK_HLE (0x1 << 12)
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#define INTMSK_SBE (0x1 << 13)
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#define INTMSK_ACD (0x1 << 14)
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#define INTMSK_EBE (0x1 << 15)
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/* Command Register */
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#define CMD_RESP_EXP_BIT (0x1 << 6)
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#define CMD_RESP_LENGTH_BIT (0x1 << 7)
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#define CMD_CHECK_CRC_BIT (0x1 << 8)
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#define CMD_DATA_EXP_BIT (0x1 << 9)
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#define CMD_RW_BIT (0x1 << 10)
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#define CMD_SENT_AUTO_STOP_BIT (0x1 << 12)
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#define CMD_WAIT_PRV_DAT_BIT (0x1 << 13)
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#define CMD_SEND_CLK_ONLY (0x1 << 21)
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#define CMD_USE_HOLD_REG (0x1 << 29)
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#define CMD_STRT_BIT (0x1 << 31)
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#define CMD_ONLY_CLK (CMD_STRT_BIT | CMD_SEND_CLK_ONLY | \
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CMD_WAIT_PRV_DAT_BIT)
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/* Raw Interrupt Register */
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#define DATA_ERR (INTMSK_EBE | INTMSK_SBE | INTMSK_HLE | \
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INTMSK_FRUN | INTMSK_EBE | INTMSK_DCRC)
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#define DATA_TOUT (INTMSK_HTO | INTMSK_DRTO)
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/* Status Register */
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#define DATA_BUSY (0x1 << 9)
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/* FIFO Threshold Watermark Register */
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#define TX_WMARK (0xFFF << 0)
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#define RX_WMARK (0xFFF << 16)
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#define MSIZE_MASK (0x7 << 28)
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/* DW DMA Mutiple Transaction Size */
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#define MSIZE_8 (2 << 28)
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/* Bus Mode Register */
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#define BMOD_IDMAC_RESET (0x1 << 0)
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#define BMOD_IDMAC_FB (0x1 << 1)
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#define BMOD_IDMAC_ENABLE (0x1 << 7)
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/* IDMAC bits */
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#define MSHCI_IDMAC_OWN (0x1 << 31)
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#define MSHCI_IDMAC_CH (0x1 << 4)
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#define MSHCI_IDMAC_FS (0x1 << 3)
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#define MSHCI_IDMAC_LD (0x1 << 2)
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int s5p_mshci_init(const void *blob);
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#endif
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#endif
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