Change-Id: I4356a8bda71e84afe8c348d366479c5006bf2459 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49796 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
30 lines
589 B
Plaintext
30 lines
589 B
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
|
|
#include <acpi/acpi.h>
|
|
DefinitionBlock(
|
|
"dsdt.aml",
|
|
"DSDT",
|
|
ACPI_DSDT_REV_2,
|
|
OEM_ID,
|
|
ACPI_TABLE_CREATOR,
|
|
0x20110725 // OEM revision
|
|
)
|
|
{
|
|
#include <acpi/dsdt_top.asl>
|
|
#include <soc/intel/common/block/acpi/acpi/platform.asl>
|
|
|
|
// global NVS and variables
|
|
#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
|
|
|
|
Scope (\_SB) {
|
|
Device (PCI0)
|
|
{
|
|
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
|
|
#include <soc/intel/cannonlake/acpi/southbridge.asl>
|
|
}
|
|
}
|
|
|
|
#include <southbridge/intel/common/acpi/sleepstates.asl>
|
|
|
|
}
|