We have fatal(), which is just as good. Coccinelle script: @@ expression E; @@ -usb_fatal(E) +fatal(E) Change-Id: Iabecbcc7d068cc0f82687bf51d89c2626642cd86 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/395 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
		
			
				
	
	
		
			263 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			263 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is part of the libpayload project.
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|  *
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|  * Copyright (C) 2010 Patrick Georgi
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions
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|  * are met:
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|  * 1. Redistributions of source code must retain the above copyright
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|  *    notice, this list of conditions and the following disclaimer.
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|  * 2. Redistributions in binary form must reproduce the above copyright
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|  *    notice, this list of conditions and the following disclaimer in the
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|  *    documentation and/or other materials provided with the distribution.
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|  * 3. The name of the author may not be used to endorse or promote products
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|  *    derived from this software without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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|  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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|  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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|  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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|  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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|  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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|  * SUCH DAMAGE.
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|  */
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| 
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| #define USB_DEBUG
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| 
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| #include <arch/virtual.h>
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| #include "xhci.h"
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| #include "xhci_private.h"
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| 
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| static void xhci_start (hci_t *controller);
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| static void xhci_stop (hci_t *controller);
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| static void xhci_reset (hci_t *controller);
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| static void xhci_shutdown (hci_t *controller);
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| static int xhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize);
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| static int xhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
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| 			 int dalen, u8 *data);
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| static void* xhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming);
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| static void xhci_destroy_intr_queue (endpoint_t *ep, void *queue);
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| static u8* xhci_poll_intr_queue (void *queue);
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| 
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| static void
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| xhci_reset (hci_t *controller)
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| {
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| }
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| 
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| hci_t *
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| xhci_init (pcidev_t addr)
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| {
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| 	int i;
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| 
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| 	hci_t *controller = new_controller ();
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| 
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| 	if (!controller)
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| 		fatal("Could not create USB controller instance.\n");
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| 
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| 	controller->instance = malloc (sizeof (xhci_t));
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| 	if(!controller->instance)
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| 		fatal("Not enough memory creating USB controller instance.\n");
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| 
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| 	controller->start = xhci_start;
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| 	controller->stop = xhci_stop;
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| 	controller->reset = xhci_reset;
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| 	controller->shutdown = xhci_shutdown;
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| 	controller->bulk = xhci_bulk;
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| 	controller->control = xhci_control;
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| 	controller->create_intr_queue = xhci_create_intr_queue;
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| 	controller->destroy_intr_queue = xhci_destroy_intr_queue;
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| 	controller->poll_intr_queue = xhci_poll_intr_queue;
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| 	for (i = 0; i < 128; i++) {
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| 		controller->devices[i] = 0;
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| 	}
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| 	init_device_entry (controller, 0);
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| 	XHCI_INST (controller)->roothub = controller->devices[0];
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| 
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| 	controller->bus_address = addr;
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| 	controller->reg_base = (u32)phys_to_virt(pci_read_config32 (controller->bus_address, 0x10) & ~0xf);
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| 	//controller->reg_base = pci_read_config32 (controller->bus_address, 0x14) & ~0xf;
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| 	if (pci_read_config32 (controller->bus_address, 0x14) > 0) {
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| 		fatal("We don't do 64bit addressing.\n");
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| 	}
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| 	debug("regbase: %lx\n", controller->reg_base);
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| 
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| 	XHCI_INST (controller)->capreg = (void*)controller->reg_base;
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| 	XHCI_INST (controller)->opreg = (void*)(controller->reg_base + XHCI_INST (controller)->capreg->caplength);
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| 	XHCI_INST (controller)->hcrreg = (void*)(controller->reg_base + XHCI_INST (controller)->capreg->rtsoff);
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| 	XHCI_INST (controller)->dbreg = (void*)(controller->reg_base + XHCI_INST (controller)->capreg->dboff);
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| 	debug("caplen: %lx\nrtsoff: %lx\ndboff: %lx\n", XHCI_INST (controller)->capreg->caplength, XHCI_INST (controller)->capreg->rtsoff, XHCI_INST (controller)->capreg->dboff);
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| 	debug("caplength: %x\n", XHCI_INST (controller)->capreg->caplength);
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| 	debug("hciversion: %x.%x\n", XHCI_INST (controller)->capreg->hciver_hi, XHCI_INST (controller)->capreg->hciver_lo);
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| 	if ((XHCI_INST (controller)->capreg->hciversion < 0x96) || (XHCI_INST (controller)->capreg->hciversion > 0x100)) {
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| 		fatal("Unsupported xHCI version\n");
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| 	}
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| 	debug("maxslots: %x\n", XHCI_INST (controller)->capreg->MaxSlots);
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| 	debug("maxports: %x\n", XHCI_INST (controller)->capreg->MaxPorts);
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| 	int pagesize = XHCI_INST (controller)->opreg->pagesize << 12;
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| 	debug("pagesize: %x\n", pagesize);
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| 
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| 	XHCI_INST (controller)->dcbaa = memalign(64, (XHCI_INST (controller)->capreg->MaxSlots+1)*sizeof(devctxp_t));
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| 	memset((void*)XHCI_INST (controller)->dcbaa, 0, (XHCI_INST (controller)->capreg->MaxSlots+1)*sizeof(devctxp_t));
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| 
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| 	debug("max scratchpad bufs: %x\n", XHCI_INST (controller)->capreg->Max_Scratchpad_Bufs);
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| 	if (XHCI_INST (controller)->capreg->Max_Scratchpad_Bufs > 0) {
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| 		XHCI_INST (controller)->dcbaa->ptr = memalign(64, XHCI_INST (controller)->capreg->Max_Scratchpad_Bufs * 8);
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| 	}
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| 
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| 	XHCI_INST (controller)->opreg->dcbaap_lo = virt_to_phys(XHCI_INST (controller)->dcbaa);
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| 	XHCI_INST (controller)->opreg->dcbaap_hi = 0;
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| 
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| 	printf("waiting for controller to be ready - ");
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| 	while ((XHCI_INST (controller)->opreg->usbsts & USBSTS_CNR) != 0) mdelay(1);
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| 	printf("ok.\n");
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| 
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| 	debug("ERST Max: %lx -> %lx entries\n", XHCI_INST (controller)->capreg->ERST_Max, 1<<(XHCI_INST (controller)->capreg->ERST_Max));
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| 
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| 	// enable all available slots
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| 	XHCI_INST (controller)->opreg->config = XHCI_INST (controller)->capreg->MaxSlots & CONFIG_MASK_MaxSlotsEn;
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| 
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| 	XHCI_INST (controller)->cmd_ring = memalign(64, 16*sizeof(trb_t)); /* TODO: make sure not to cross 64k page boundary */
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| 	memset((void*)XHCI_INST (controller)->cmd_ring, 0, 16*sizeof(trb_t));
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| 
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| 	XHCI_INST (controller)->ev_ring = memalign(64, 16*sizeof(trb_t)); /* TODO: make sure not to cross 64k page boundary */
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| 	memset((void*)XHCI_INST (controller)->ev_ring, 0, 16*sizeof(trb_t));
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| 
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| 	XHCI_INST (controller)->ev_ring_table = memalign(64, sizeof(erst_entry_t));
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| 	memset((void*)XHCI_INST (controller)->ev_ring_table, 0, sizeof(erst_entry_t));
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| 	XHCI_INST (controller)->ev_ring_table[0].seg_base_lo = virt_to_phys(XHCI_INST (controller)->ev_ring);
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| 	XHCI_INST (controller)->ev_ring_table[0].seg_base_hi = 0;
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| 	XHCI_INST (controller)->ev_ring_table[0].seg_size = 16;
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| 
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| 	// init command ring
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| 	XHCI_INST (controller)->opreg->crcr_lo = virt_to_phys(XHCI_INST (controller)->cmd_ring) | CRCR_RCS;
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| 	XHCI_INST (controller)->opreg->crcr_hi = 0;
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| 	XHCI_INST (controller)->cmd_ccs = 1;
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| 	XHCI_INST (controller)->ev_ccs = 1;
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| 
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| 	// init primary interrupter
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| 	XHCI_INST (controller)->hcrreg->intrrs[0].erstsz = 1;
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| 	XHCI_INST (controller)->hcrreg->intrrs[0].erdp_lo = virt_to_phys(XHCI_INST (controller)->ev_ring);
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| 	XHCI_INST (controller)->hcrreg->intrrs[0].erdp_hi = 0;
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| 	XHCI_INST (controller)->hcrreg->intrrs[0].erstba_lo = virt_to_phys(XHCI_INST (controller)->ev_ring_table);
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| 	XHCI_INST (controller)->hcrreg->intrrs[0].erstba_hi = 0;
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| 
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| 	XHCI_INST (controller)->opreg->usbcmd |= USBCMD_RS; /* start USB controller */
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| 	XHCI_INST (controller)->dbreg[0] = 0; // and tell controller to consume commands
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| 
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| 	/* TODO: TEST */
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| 	// setup noop command
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| 	trb_t *cmd = &XHCI_INST (controller)->cmd_ring[0];
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| 	((u32*)cmd)[3] = 1-XHCI_INST (controller)->cmd_ccs; // disable command descriptor
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| 	((u32*)cmd)[0] = 0;
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| 	((u32*)cmd)[1] = 0;
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| 	((u32*)cmd)[2] = 0;
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| 	cmd->cmd_No_Op.TRB_Type = TRB_CMD_NOOP;
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| 
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| 	// ring the HC doorbell
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| 	debug("Posting command at %lx\n", virt_to_phys(cmd));
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| 	cmd->cmd_No_Op.C = XHCI_INST (controller)->cmd_ccs; // enable command
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| 	XHCI_INST (controller)->dbreg[0] = 0; // and tell controller to consume commands
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| 
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| 	// wait for result in event ring
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| 	trb_t *ev = &XHCI_INST (controller)->ev_ring[0];
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| 	trb_t *ev1 = &XHCI_INST (controller)->ev_ring[1];
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| 	while (ev->event_cmd_cmpl.C != XHCI_INST (controller)->ev_ccs) {
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| 		debug("CRCR: %lx, USBSTS: %lx\n",  XHCI_INST (controller)->opreg->crcr_lo, XHCI_INST (controller)->opreg->usbsts);
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| 		debug("ev0.C %x, ev1.C %x\n", ev->event_cmd_cmpl.C, ev1->event_cmd_cmpl.C);
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| 		mdelay(100);
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| 	}
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| 	debug("command ring is %srunning\n", (XHCI_INST (controller)->opreg->crcr_lo & CRCR_CRR)?"":"not ");
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| 	switch (ev->event_cmd_cmpl.TRB_Type) {
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| 		case TRB_EV_CMD_CMPL:
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| 			debug("Completed command TRB at %lx. Code: %d\n",
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| 				ev->event_cmd_cmpl.Cmd_TRB_Pointer_lo, ev->event_cmd_cmpl.Completion_Code);
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| 			break;
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| 		case TRB_EV_PORTSC:
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| 			debug("Port Status Change Event. Completion Code: %d\n Port: %d. Ignoring.\n",
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| 				ev->event_cmd_cmpl.Completion_Code, ev->event_portsc.Port);
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| 			// we ignore the event as we look for the PORTSC registers instead, at a time when it suits _us_
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| 			break;
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| 		default:
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| 			debug("Unknown event: %d, Completion Code: %d\n", ev->event_cmd_cmpl.TRB_Type, ev->event_cmd_cmpl.Completion_Code);
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| 			break;
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| 	}
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| 	debug("CRCR: %lx, USBSTS: %lx\n",  XHCI_INST (controller)->opreg->crcr_lo, XHCI_INST (controller)->opreg->usbsts);
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| 	debug("ev0.C %x, ev1.C %x, ev1.CC %d\n", ev->event_cmd_cmpl.C, ev1->event_cmd_cmpl.C, ev1->event_cmd_cmpl.Completion_Code);
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| 
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| 	controller->devices[0]->controller = controller;
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| 	controller->devices[0]->init = xhci_rh_init;
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| 	controller->devices[0]->init (controller->devices[0]);
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| 
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| 	xhci_reset (controller);
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| 	return controller;
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| }
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| 
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| static void
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| xhci_shutdown (hci_t *controller)
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| {
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| 	if (controller == 0)
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| 		return;
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| 	detach_controller (controller);
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| 	XHCI_INST (controller)->roothub->destroy (XHCI_INST (controller)->
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| 						  roothub);
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| 	/* TODO: stop hardware, kill data structures */
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| 	free (XHCI_INST (controller));
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| 	free (controller);
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| }
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| 
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| static void
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| xhci_start (hci_t *controller)
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| {
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| }
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| 
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| static void
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| xhci_stop (hci_t *controller)
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| {
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| }
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| 
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| static int
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| xhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen,
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| 	      unsigned char *data)
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| {
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| 	return 1;
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| }
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| 
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| /* finalize == 1: if data is of packet aligned size, add a zero length packet */
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| static int
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| xhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
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| {
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| 	int maxpsize = ep->maxpacketsize;
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| 	if (maxpsize == 0)
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| 		fatal("MaxPacketSize == 0!!!");
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| 	return 1;
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| }
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| 
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| /* create and hook-up an intr queue into device schedule */
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| static void*
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| xhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming)
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| {
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| 	return NULL;
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| }
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| 
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| /* remove queue from device schedule, dropping all data that came in */
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| static void
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| xhci_destroy_intr_queue (endpoint_t *ep, void *q_)
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| {
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| 	//free(q);
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| }
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| 
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| /* read one intr-packet from queue, if available. extend the queue for new input.
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|    return NULL if nothing new available.
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|    Recommended use: while (data=poll_intr_queue(q)) process(data);
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|  */
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| static u8*
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| xhci_poll_intr_queue (void *q_)
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| {
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| 	return NULL;
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| }
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