ae317695e3
Functional changes were already done in 5eb81bed2e (sb/intel/i82801gx:
Detect if the southbridge supports AHCI) but we forgot to update the
`chip.h` and devicetrees.
Change-Id: I0e25f54ead8f5bbc6041d31347038e800787b624
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34462
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
189 lines
5.1 KiB
Plaintext
189 lines
5.1 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2009 coresystems GmbH
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## Copyright (C) 2016 Arthur Heymans arthur@aheymans.xyz
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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chip northbridge/intel/i945
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device cpu_cluster 0 on
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chip cpu/intel/socket_LGA775
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device lapic 0 on end
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end
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chip cpu/intel/model_1067x
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device lapic 0xACAC off end
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end
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end
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register "pci_mmio_size" = "768"
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device domain 0 on
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device pci 00.0 on # host bridge
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subsystemid 0x1458 0x5000
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end
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device pci 01.0 on # i945 PCIe root port
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subsystemid 0x1458 0x5000
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ioapic_irq 2 INTA 0x10
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end
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device pci 02.0 on # vga controller
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subsystemid 0x1458 0xd000
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ioapic_irq 2 INTA 0x10
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end
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chip southbridge/intel/i82801gx
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register "pirqa_routing" = "0x8c"
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register "pirqb_routing" = "0x8a"
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register "pirqc_routing" = "0x83"
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register "pirqd_routing" = "0x8b"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x85"
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# GPI routing
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# 0 No effect (default)
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# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "gpi0_routing" = "1"
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register "gpi1_routing" = "1"
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register "gpi2_routing" = "1"
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register "gpi3_routing" = "1"
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register "gpi4_routing" = "1"
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register "gpi5_routing" = "1"
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register "gpi6_routing" = "1"
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register "gpi7_routing" = "1"
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register "gpi8_routing" = "1"
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register "gpi9_routing" = "1"
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register "gpi10_routing" = "1"
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register "gpi11_routing" = "1"
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register "gpi12_routing" = "1"
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register "gpi13_routing" = "2"
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register "gpi14_routing" = "1"
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register "gpi15_routing" = "1"
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register "gpe0_en" = "0"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x0"
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register "c3_latency" = "85"
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register "p_cnt_throttling_supported" = "0"
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device pci 1b.0 on # High Definition Audio
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ioapic_irq 2 INTA 0x10
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end
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device pci 1c.0 on end # PCIe
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device pci 1c.1 on end # PCIe
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device pci 1c.2 off end # PCIe port 3
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device pci 1c.3 off end # PCIe port 4
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device pci 1c.4 off end # PCIe port 5
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device pci 1c.5 off end # PCIe port 6
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device pci 1d.0 on # USB UHCI
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ioapic_irq 2 INTA 0x10
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end
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device pci 1d.1 on # USB UHCI
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ioapic_irq 2 INTB 0x11
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end
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device pci 1d.2 on # USB UHCI
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ioapic_irq 2 INTC 0x12
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end
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device pci 1d.3 on # USB UHCI
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ioapic_irq 2 INTD 0x13
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end
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device pci 1d.7 on # USB2 EHCI
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ioapic_irq 2 INTA 0x10
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end
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device pci 1e.0 on end # PCI bridge
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device pci 1e.2 off end # AC'97 Audio
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device pci 1e.3 off end # AC'97 Modem
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device pci 1f.0 on # LPC bridge
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ioapic_irq 2 INTA 0x10
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chip superio/ite/it8718f # Super I/O
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register "TMPIN1.mode" = "THERMAL_RESISTOR"
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register "TMPIN2.mode" = "THERMAL_RESISTOR"
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register "TMPIN3.mode" = "THERMAL_DIODE"
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register "TMPIN3.offset" = "0"
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register "ec.vin_mask" = "VIN_ALL"
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register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
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register "FAN1.smart.tmpin" = "3"
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register "FAN1.smart.tmp_off" = "30"
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register "FAN1.smart.tmp_start" = "35"
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register "FAN1.smart.tmp_full" = "75"
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register "FAN1.smart.tmp_delta" = "3"
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register "FAN1.smart.smoothing" = "1"
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register "FAN1.smart.pwm_start" = "0"
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register "FAN1.smart.slope" = "10"
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register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
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register "FAN2.smart.tmpin" = "3"
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register "FAN2.smart.tmp_off" = "30"
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register "FAN2.smart.tmp_start" = "35"
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register "FAN2.smart.tmp_full" = "75"
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register "FAN2.smart.tmp_delta" = "3"
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register "FAN2.smart.smoothing" = "1"
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register "FAN2.smart.pwm_start" = "0"
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register "FAN2.smart.slope" = "10"
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device pnp 2e.0 off end # Floppy
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device pnp 2e.1 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.2 off end # COM2
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device pnp 2e.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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io 0x62 = 0
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drq 0x74 = 4
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irq 0xf0 = 0x08
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end
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device pnp 2e.4 on # Environment controller
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io 0x60 = 0x290
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irq 0x70 = 0x00
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io 0x62 = 0x000
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irq 0xf0 = 0x00
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irq 0xf1 = 0x00
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irq 0xf2 = 0x0a
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irq 0xf3 = 0x00
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irq 0xf4 = 0x80
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irq 0xf5 = 0x20
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irq 0xf6 = 0x3e
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end
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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irq 0x70 = 1
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io 0x62 = 0x64
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irq 0xf0 = 0x48
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end
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device pnp 2e.6 on # Mouse
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irq 0x70 = 0
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irq 0x71 = 2
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irq 0xf0 = 0
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end
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end
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end
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device pci 1f.1 on # IDE
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ioapic_irq 2 INTB 0x11
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end
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device pci 1f.2 on # SATA
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ioapic_irq 2 INTC 0x12
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end
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device pci 1f.3 on # SMBus
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ioapic_irq 2 INTD 0x13
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end
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end
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end
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end
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