ae317695e3
Functional changes were already done in 5eb81bed2e (sb/intel/i82801gx:
Detect if the southbridge supports AHCI) but we forgot to update the
`chip.h` and devicetrees.
Change-Id: I0e25f54ead8f5bbc6041d31347038e800787b624
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34462
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
136 lines
3.5 KiB
Plaintext
136 lines
3.5 KiB
Plaintext
chip northbridge/intel/i945
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# IGD Displays
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register "gfx.ndid" = "3"
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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device cpu_cluster 0 on
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chip cpu/intel/socket_m
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device lapic 0 on end
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end
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end
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register "pci_mmio_size" = "768"
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 01.0 off end # i945 PCIe root port
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device pci 02.0 on end # vga controller
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device pci 02.1 on end # display controller
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chip southbridge/intel/i82801gx
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register "pirqa_routing" = "0x0b"
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register "pirqb_routing" = "0x0b"
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register "pirqc_routing" = "0x0b"
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register "pirqd_routing" = "0x0b"
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register "pirqe_routing" = "0x0b"
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register "pirqf_routing" = "0x0b"
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register "pirqg_routing" = "0x0b"
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register "pirqh_routing" = "0x0b"
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# GPI routing
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# 0 No effect (default)
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# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "gpi13_routing" = "1"
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register "sata_mode" = "SATA_MODE_IDE_LEGACY_COMBINED"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x1"
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register "c3_latency" = "85"
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register "p_cnt_throttling_supported" = "0"
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device pci 1b.0 on end # High Definition Audio
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device pci 1c.0 on end # PCIe
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device pci 1c.1 on end # PCIe
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device pci 1c.2 on end # PCIe
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device pci 1c.3 off end # PCIe port 4
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device pci 1c.4 off end # PCIe port 5
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device pci 1c.5 off end # PCIe port 6
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device pci 1d.0 on end # USB UHCI
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device pci 1d.1 on end # USB UHCI
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device pci 1d.2 on end # USB UHCI
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device pci 1d.3 on end # USB UHCI
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device pci 1d.7 on end # USB2 EHCI
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device pci 1e.0 on end # PCI bridge
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device pci 1e.2 off end # AC'97 Audio
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device pci 1e.3 off end # AC'97 Modem
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device pci 1f.0 on # LPC bridge
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chip superio/winbond/w83627thg
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device pnp 2e.0 off # Floppy
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end
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 5
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end
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device pnp 2e.2 on
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on
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io 0x60 = 0x2f8
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irq 0x70 = 3
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irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
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end
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device pnp 2e.5 on # Keyboard+Mouse
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x72 = 12
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irq 0xf0 = 0x82 # HW accel A20.
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end
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device pnp 2e.7 on # GPIO1, GAME, MIDI
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io 0x62 = 0x330
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irq 0x70 = 9
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end
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device pnp 2e.8 on # GPIO2
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# all default
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end
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device pnp 2e.9 on # GPIO3/4
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irq 0x30 = 0x03 # does this work?
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irq 0xf0 = 0xfb # set inputs/outputs
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irq 0xf1 = 0x66
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end
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device pnp 2e.a off # ACPI
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end
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device pnp 2e.b on # HWM
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io 0x60 = 0xa00
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irq 0x70 = 0
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end
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end
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chip superio/winbond/w83627thg
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device pnp 4e.0 off # Floppy
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end
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device pnp 4e.1 off # Parport
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end
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device pnp 4e.2 on # COM3
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io 0x60 = 0x3e8
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irq 0x70 = 6
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end
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device pnp 4e.3 on # COM4
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io 0x60 = 0x2e8
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irq 0x70 = 6
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irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
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end
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device pnp 4e.5 off # Keyboard
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end
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device pnp 4e.7 off # GPIO1, GAME, MIDI
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end
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device pnp 4e.8 off # GPIO2
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end
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device pnp 4e.9 off # GPIO3/4
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end
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device pnp 4e.a off # ACPI
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end
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device pnp 4e.b off # HWM
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end
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end
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end
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device pci 1f.1 off end # IDE
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device pci 1f.2 on end # SATA
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device pci 1f.3 on end # SMBus
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end
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end
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end
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