ae593879f5
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I22fffa0eab006be2bad4d3dd776b22ad9830faef Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40129 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
20 lines
464 B
Plaintext
20 lines
464 B
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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Device(PCI0) {
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/* Describe the AMD Northbridge */
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#include "northbridge.asl"
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/* Describe the AMD Fusion Controller Hub */
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#include "sb_pci0_fch.asl"
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}
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/* Describe PCI INT[A-H] for the Southbridge */
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#include "pci_int.asl"
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/* Describe the devices in the Southbridge */
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#include "sb_fch.asl"
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/* Add GPIO library */
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#include <soc/amd/common/acpi/gpio_bank_lib.asl>
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