b04cc6b902
This callback was only required for a single mainboard, and it can easily be moved to mainboard-specific code. This patch removes it from the global namespace and isolates it to the Jecht board. (This makes it easier to separate vboot and chromeos code in a later patch.) Change-Id: I9cf67a75a052d1c86eda0393b6a9fbbe255fedf8 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18981 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
137 lines
3.9 KiB
C
137 lines
3.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __CHROMEOS_H__
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#define __CHROMEOS_H__
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#include <stddef.h>
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#include <stdint.h>
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#include <bootmode.h>
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#include <device/device.h>
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#include <rules.h>
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#include <vboot/misc.h>
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#include <vboot/vboot_common.h>
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#if CONFIG_CHROMEOS
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/* functions implemented in watchdog.c */
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void mark_watchdog_tombstone(void);
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void reboot_from_watchdog(void);
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#else
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static inline void mark_watchdog_tombstone(void) { return; }
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static inline void reboot_from_watchdog(void) { return; }
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#endif /* CONFIG_CHROMEOS */
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struct romstage_handoff;
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#include "gnvs.h"
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struct device;
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#if CONFIG_CHROMEOS_RAMOOPS
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void chromeos_ram_oops_init(chromeos_acpi_t *chromeos);
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#if CONFIG_CHROMEOS_RAMOOPS_DYNAMIC
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static inline void chromeos_reserve_ram_oops(struct device *dev, int idx) {}
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#else /* CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
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void chromeos_reserve_ram_oops(struct device *dev, int idx);
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#endif /* CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
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#else /* !CONFIG_CHROMEOS_RAMOOPS */
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static inline void chromeos_ram_oops_init(chromeos_acpi_t *chromeos) {}
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static inline void chromeos_reserve_ram_oops(struct device *dev, int idx) {}
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#endif /* CONFIG_CHROMEOS_RAMOOPS */
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void cbmem_add_vpd_calibration_data(void);
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/*
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* Create the OIPG package containing the Chrome OS gpios described by
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* the chromeos_gpio array.
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*/
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struct cros_gpio;
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void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num);
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/*
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* Common helper function and delcarations for mainboards to use to generate
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* ACPI-specific Chrome OS needs.
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*/
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void mainboard_chromeos_acpi_generate(void);
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#if IS_ENABLED(CONFIG_CHROMEOS)
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void chromeos_dsdt_generator(struct device *dev);
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#else
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#define chromeos_dsdt_generator DEVICE_NOOP
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#endif
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enum {
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CROS_GPIO_REC = 1, /* Recovery */
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CROS_GPIO_DEV = 2, /* Developer */
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CROS_GPIO_WP = 3, /* Write Protect */
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CROS_GPIO_PE = 4, /* Phase enforcement for final product */
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CROS_GPIO_ACTIVE_LOW = 0,
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CROS_GPIO_ACTIVE_HIGH = 1,
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CROS_GPIO_VIRTUAL = -1,
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};
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struct cros_gpio {
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int type;
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int polarity;
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int gpio_num;
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const char *device;
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};
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#define CROS_GPIO_INITIALIZER(typ, pol, num, dev) \
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{ \
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.type = (typ), \
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.polarity = (pol), \
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.gpio_num = (num), \
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.device = (dev), \
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}
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#define CROS_GPIO_REC_INITIALIZER(pol, num, dev) \
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CROS_GPIO_INITIALIZER(CROS_GPIO_REC, pol, num, dev)
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#define CROS_GPIO_REC_AL(num, dev) \
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CROS_GPIO_REC_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
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#define CROS_GPIO_REC_AH(num, dev) \
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CROS_GPIO_REC_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
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#define CROS_GPIO_DEV_INITIALIZER(pol, num, dev) \
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CROS_GPIO_INITIALIZER(CROS_GPIO_DEV, pol, num, dev)
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#define CROS_GPIO_DEV_AL(num, dev) \
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CROS_GPIO_DEV_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
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#define CROS_GPIO_DEV_AH(num, dev) \
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CROS_GPIO_DEV_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
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#define CROS_GPIO_WP_INITIALIZER(pol, num, dev) \
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CROS_GPIO_INITIALIZER(CROS_GPIO_WP, pol, num, dev)
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#define CROS_GPIO_WP_AL(num, dev) \
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CROS_GPIO_WP_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
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#define CROS_GPIO_WP_AH(num, dev) \
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CROS_GPIO_WP_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
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#define CROS_GPIO_PE_INITIALIZER(pol, num, dev) \
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CROS_GPIO_INITIALIZER(CROS_GPIO_PE, pol, num, dev)
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#define CROS_GPIO_PE_AL(num, dev) \
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CROS_GPIO_PE_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
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#define CROS_GPIO_PE_AH(num, dev) \
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CROS_GPIO_PE_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
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#endif /* __CHROMEOS_H__ */
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