b1fcbf364f
Change-Id: I168db92b10d5abc05be2dc374df3f892003d5255 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10317 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef S3_RESUME_H
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#define S3_RESUME_H
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void restore_mtrr(void);
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void prepare_for_resume(void);
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void backup_mtrr(void *mtrr_store, u32 *mtrr_store_size);
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const void *OemS3Saved_MTRR_Storage(void);
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void *GetHeapBase(void);
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void EmptyHeap(void);
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void ResumeHeap(void **heap, size_t *len);
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#define BSP_STACK_BASE_ADDR 0x30000
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#if 1
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/* This covers node 0 only. */
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#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR)
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#else
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/* This covers total of 8 nodes. */
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#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR)
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#endif
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#define HIGH_MEMORY_SCRATCH 0x30000
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#endif
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