b20d4ba57a
Choose appropriate debug levels for the various messages in the FSP driver. Change: * BIOS_DEBUG --> BIOS_SPEW: Normal FSP driver output level, allows builder to disable FSP driver output by selecting CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 * BIOS_ERROR --> BIOS_CRIT: These errors will prevent coreboot and the payload from successfully booting TEST=Build and run on Galileo Gen2 Change-Id: Ic3352de2022e16482bf47fc953aedeef8f0c2880 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16003 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
126 lines
3.4 KiB
C
126 lines
3.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <console/console.h>
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#include <fsp/util.h>
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#include <soc/intel/common/util.h>
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/*-----------
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* MemoryInit
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*-----------
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*/
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void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
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const struct FSPM_UPD *fspm_old_upd,
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const struct FSPM_UPD *fspm_new_upd)
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{
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/* Display the MTRRs */
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if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
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soc_display_mtrrs();
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/* Display the UPD values */
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if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
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fspm_display_upd_values(fspm_old_upd, fspm_new_upd);
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/* Display the call entry point and paramters */
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if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
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return;
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printk(BIOS_SPEW, "Calling FspMemoryInit: 0x%p\n", memory_init);
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printk(BIOS_SPEW, "\t0x%p: raminit_upd\n", fspm_new_upd);
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printk(BIOS_SPEW, "\t0x%p: &hob_list_ptr\n", fsp_get_hob_list_ptr());
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}
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void fsp_debug_after_memory_init(enum fsp_status status)
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{
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if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
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printk(BIOS_SPEW, "FspMemoryInit returned 0x%08x\n", status);
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/* Verify that the HOB list pointer was set */
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if (fsp_get_hob_list() == NULL)
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die("ERROR - HOB list pointer was not returned!\n");
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/* Display and verify the HOBs */
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if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
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fsp_display_hobs();
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if (IS_ENABLED(CONFIG_VERIFY_HOBS))
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fsp_verify_memory_init_hobs();
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/* Display the MTRRs */
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if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
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soc_display_mtrrs();
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}
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/*-----------
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* SiliconInit
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*-----------
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*/
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void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
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const struct FSPS_UPD *fsps_old_upd,
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const struct FSPS_UPD *fsps_new_upd)
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{
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/* Display the MTRRs */
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if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
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soc_display_mtrrs();
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/* Display the UPD values */
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if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
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soc_display_fsps_upd_params(fsps_old_upd, fsps_new_upd);
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/* Display the call to FSP SiliconInit */
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if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
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return;
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printk(BIOS_SPEW, "Calling FspSiliconInit: 0x%p\n", silicon_init);
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printk(BIOS_SPEW, "\t0x%p: upd\n", fsps_new_upd);
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}
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void fsp_debug_after_silicon_init(enum fsp_status status)
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{
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if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
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printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status);
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/* Display the HOBs */
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if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
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fsp_display_hobs();
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/* Display the MTRRs */
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if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
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soc_display_mtrrs();
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}
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/*-----------
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* FspNotify
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*-----------
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*/
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void fsp_before_debug_notify(fsp_notify_fn notify,
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const struct fsp_notify_params *notify_params)
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{
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/* Display the call to FspNotify */
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if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
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return;
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printk(BIOS_SPEW, "0x%08x: notify_params->phase\n",
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notify_params->phase);
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printk(BIOS_SPEW, "Calling FspNotify: 0x%p\n", notify);
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printk(BIOS_SPEW, "\t0x%p: notify_params\n", notify_params);
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}
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void fsp_debug_after_notify(enum fsp_status status)
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{
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if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
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printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status);
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/* Display the HOBs */
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if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
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fsp_display_hobs();
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/* Display the MTRRs */
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if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
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soc_display_mtrrs();
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}
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