78c3e33550
We've got enough of a handle on this to realize some things: drm_dp_helper.h is by design device and architecture independent i915.h is common to most intel graphics chipsets going back several years i915_reg.h is as well Move these files to src/include/device, and adjust the .c files accordingly. Change-Id: I07512b3695fea0b22949074b467986420783d62a Signed-off-by: Ronald G. Minnich <rminnich@google.com> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3637 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2012 Google Inc.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/i915_reg.h>
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#include <device/drm_dp_helper.h>
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/* things that are, strangely, not defined anywhere? */
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#define PCH_PP_UNLOCK 0xabcd0000
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#define WMx_LP_SR_EN (1<<31)
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#define PRB0_TAIL 0x02030
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#define PRB0_HEAD 0x02034
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#define PRB0_START 0x02038
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#define PRB0_CTL 0x0203c
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/* debug enums. These are for printks that, due to their place in the
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* middle of graphics device IO, might change timing. Use with care
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* or not at all.
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*/
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enum {
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vio = 2, /* dump every IO */
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vspin = 4, /* print # of times we spun on a register value */
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};
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/* The mainboard must provide these functions. */
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unsigned long io_i915_read32(unsigned long addr);
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void io_i915_write32(unsigned long val, unsigned long addr);
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void graphics_register_reset(u32 aux_ctl, u32 aux_data, int verbose);
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/* intel_dp.c */
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u32 pack_aux(u32 *src, int src_bytes);
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void unpack_aux(u32 src, u8 *dst, int dst_bytes);
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int intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
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u8 *recv, int recv_size);
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