b5828d7445
the information is already specified in cmos.layout. coreboot is changed to use that version instead. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmai.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
49 lines
926 B
Plaintext
49 lines
926 B
Plaintext
config BOARD_INTEL_MTARVON
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bool "3100 devkit (Mt. Arvon)"
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select ARCH_X86
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select CPU_INTEL_SOCKET_MPGA479M
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select NORTHBRIDGE_INTEL_I3100
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select SOUTHBRIDGE_INTEL_I3100
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select SUPERIO_INTEL_I3100
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select ROMCC
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select HAVE_HARD_RESET
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select UDELAY_TSC
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select BOARD_ROMSIZE_KB_2048
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config MAINBOARD_DIR
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string
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default intel/mtarvon
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depends on BOARD_INTEL_MTARVON
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config MAINBOARD_PART_NUMBER
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string
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default "3100 devkit (Mt. Arvon)"
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depends on BOARD_INTEL_MTARVON
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config HAVE_OPTION_TABLE
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bool
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default n
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depends on BOARD_INTEL_MTARVON
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config IRQ_SLOT_COUNT
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int
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default 1
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depends on BOARD_INTEL_MTARVON
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x8086
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depends on BOARD_INTEL_MTARVON
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x2680
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depends on BOARD_INTEL_MTARVON
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config MAX_CPUS
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int
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default 4
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depends on BOARD_INTEL_MTARVON
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