Jagadish Krishnamoorthy b6b233a6e5 soc/intel/apollolake: enable RTC ...

BUG=none
TEST=Boot to OS and verfiy if rtc0 device is created
under /sys/class/rtc/

Change-Id: Idec569255859816fda467bb42a215c00f7c0e16e
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://review.coreboot.org/14883
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-05-26 23:52:25 +02:00

..

acpi

acpi/: add missing license header

2016-01-14 22:52:11 +01:00

arch

arm64: Add stack dump to exception handler

2016-05-24 20:51:28 +02:00

commonlib

cbfstool/fsp: Rename fsp1_1_relocate

2016-05-11 18:38:28 +02:00

console

console/post: be explicit about conditional cmos_post_log() compiling

2016-05-25 18:04:11 +02:00

cpu

AGESA vendorcode: Build a common amdlib

2016-05-18 10:44:43 +02:00

device

device: Add an ACPI device name and path concept to devices

2016-05-21 05:59:52 +02:00

drivers

drivers/intel/fsp2_0: Send post codes around calls to the blobs

2016-05-26 23:50:02 +02:00

ec

ec/google/chromeec/acpi: Add MKBP support

2016-05-18 20:22:38 +02:00

include

soc/intel/common: Add common smihandler code

2016-05-25 19:09:00 +02:00

lib

program.ld: Don't exclude sbe region from verstage

2016-05-21 06:04:32 +02:00

mainboard

mainboard/intel/amenia: Configure DDI0, DDI1 HPD GPIO lines.

2016-05-26 17:26:23 +02:00

northbridge

intel/sch: Merge northbridge and southbridge in src/soc

2016-05-17 21:38:17 +02:00

soc

soc/intel/apollolake: enable RTC

2016-05-26 23:52:25 +02:00

southbridge

AGESA vendorcode: Build a common amdlib

2016-05-18 10:44:43 +02:00

superio

sio/winbond: Expose enter/exit configuration state functions

2016-05-20 04:11:58 +02:00

vendorcode

vendorcode/google/chromeos/vboot2: use cbmem for postcar region selection

2016-05-25 18:04:30 +02:00

Kconfig

src/Kconfig: Move acpi Kconfig below chipset Kconfigs

2016-05-19 19:29:59 +02:00