b799e0df3d
Convert the purism/librem13v1 to a variant setup, in preparation for adding the librem15v2 board as a new variant. The Librem 13 v1 and Librem 15 v2 are nearly identical, so this minimizes new code to add support for the latter. Also update the URL in board_info to an archive.org link. Change-Id: I00bb82b9e895e2464ddaa92915c01ce0e35933a2 Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Reviewed-on: https://review.coreboot.org/26183 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
121 lines
3.2 KiB
C
121 lines
3.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef MAINBOARD_GPIO_H
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#define MAINBOARD_GPIO_H
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#include <soc/gpio.h>
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static const struct gpio_config mainboard_gpio_config[] = {
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PCH_GPIO_INPUT, /* 0 */
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PCH_GPIO_INPUT, /* 1 */
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PCH_GPIO_INPUT, /* 2 */
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PCH_GPIO_INPUT, /* 3 */
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PCH_GPIO_INPUT, /* 4 */
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PCH_GPIO_INPUT, /* 5 */
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PCH_GPIO_INPUT, /* 6 */
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PCH_GPIO_INPUT, /* 7 */
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PCH_GPIO_INPUT, /* 8 */
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PCH_GPIO_INPUT, /* 9 */
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PCH_GPIO_ACPI_SCI, /* 10 */
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PCH_GPIO_INPUT, /* 11 */
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PCH_GPIO_INPUT, /* 12 */
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PCH_GPIO_INPUT, /* 13 */
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PCH_GPIO_INPUT, /* 14 */
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PCH_GPIO_INPUT, /* 15 */
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PCH_GPIO_INPUT, /* 16 */
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PCH_GPIO_INPUT, /* 17 */
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PCH_GPIO_NATIVE, /* 18 */
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PCH_GPIO_NATIVE, /* 19 */
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PCH_GPIO_INPUT, /* 20 */
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PCH_GPIO_INPUT, /* 21 */
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PCH_GPIO_INPUT, /* 22 */
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PCH_GPIO_INPUT, /* 23 */
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PCH_GPIO_INPUT, /* 24 */
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PCH_GPIO_INPUT, /* 25 */
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PCH_GPIO_INPUT, /* 26 */
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PCH_GPIO_INPUT, /* 27 */
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PCH_GPIO_INPUT, /* 28 */
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PCH_GPIO_NATIVE, /* 29 */
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PCH_GPIO_NATIVE, /* 30 */
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PCH_GPIO_NATIVE, /* 31 */
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PCH_GPIO_INPUT, /* 32 */
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PCH_GPIO_INPUT, /* 33 */
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PCH_GPIO_INPUT, /* 34 */
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PCH_GPIO_NATIVE, /* 35 */
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PCH_GPIO_NATIVE, /* 36 */
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PCH_GPIO_NATIVE, /* 37 */
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PCH_GPIO_INPUT, /* 38 */
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PCH_GPIO_NATIVE, /* 39 */
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PCH_GPIO_NATIVE, /* 40 */
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PCH_GPIO_INPUT, /* 41 */
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PCH_GPIO_INPUT, /* 42 */
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PCH_GPIO_INPUT, /* 43 */
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PCH_GPIO_INPUT, /* 44 */
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PCH_GPIO_INPUT, /* 45 */
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PCH_GPIO_INPUT, /* 46 */
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PCH_GPIO_INPUT, /* 47 */
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PCH_GPIO_INPUT, /* 48 */
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PCH_GPIO_INPUT, /* 49 */
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PCH_GPIO_INPUT, /* 50 */
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PCH_GPIO_INPUT, /* 51 */
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PCH_GPIO_INPUT, /* 52 */
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PCH_GPIO_INPUT, /* 53 */
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PCH_GPIO_INPUT, /* 54 */
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PCH_GPIO_INPUT, /* 55 */
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PCH_GPIO_INPUT, /* 56 */
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PCH_GPIO_INPUT, /* 57 */
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PCH_GPIO_INPUT, /* 58 */
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PCH_GPIO_INPUT, /* 59 */
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PCH_GPIO_INPUT, /* 60 */
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PCH_GPIO_NATIVE, /* 61 */
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PCH_GPIO_NATIVE, /* 62 */
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PCH_GPIO_NATIVE, /* 63 */
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PCH_GPIO_INPUT, /* 64 */
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PCH_GPIO_INPUT, /* 65 */
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PCH_GPIO_INPUT, /* 66 */
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PCH_GPIO_INPUT, /* 67 */
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PCH_GPIO_INPUT, /* 68 */
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PCH_GPIO_INPUT, /* 69 */
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PCH_GPIO_INPUT, /* 70 */
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PCH_GPIO_NATIVE, /* 71 */
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PCH_GPIO_NATIVE, /* 72 */
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PCH_GPIO_INPUT, /* 73 */
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PCH_GPIO_NATIVE, /* 74 */
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PCH_GPIO_NATIVE, /* 75 */
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PCH_GPIO_NATIVE, /* 76 */
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PCH_GPIO_INPUT, /* 77 */
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PCH_GPIO_INPUT, /* 78 */
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PCH_GPIO_INPUT, /* 79 */
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PCH_GPIO_INPUT, /* 80 */
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PCH_GPIO_NATIVE, /* 81 */
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PCH_GPIO_NATIVE, /* 82 */
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PCH_GPIO_INPUT, /* 83 */
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PCH_GPIO_INPUT, /* 84 */
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PCH_GPIO_INPUT, /* 85 */
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PCH_GPIO_INPUT, /* 86 */
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PCH_GPIO_INPUT, /* 87 */
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PCH_GPIO_INPUT, /* 88 */
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PCH_GPIO_INPUT, /* 89 */
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PCH_GPIO_INPUT, /* 90 */
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PCH_GPIO_INPUT, /* 91 */
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PCH_GPIO_INPUT, /* 92 */
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PCH_GPIO_INPUT, /* 93 */
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PCH_GPIO_INPUT, /* 94 */
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PCH_GPIO_END
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};
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#endif
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