ba92428514
The monotonic time now needs to be a first class citizen in Coreboot as it is a hard dependency of the drivers/spi flash command polling function. Change-Id: I4e43d2680bf84bc525138f71c2b813b0f6be5265 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6135 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
40 lines
671 B
Plaintext
40 lines
671 B
Plaintext
config CPU_INTEL_MODEL_2065X
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bool
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if CPU_INTEL_MODEL_2065X
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_BOOTBLOCK_X86_32
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select ARCH_ROMSTAGE_X86_32
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select ARCH_RAMSTAGE_X86_32
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select SMP
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select SSE
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select SSE2
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select UDELAY_TSC
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select TSC_CONSTANT_RATE
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select SMM_TSEG
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select SUPPORT_CPU_UCODE_IN_CBFS
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select PARALLEL_CPU_INIT
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#select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select LAPIC_MONOTONIC_TIMER
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config BOOTBLOCK_CPU_INIT
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string
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default "cpu/intel/model_2065x/bootblock.c"
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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config ENABLE_VMX
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bool "Enable VMX for virtualization"
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default n
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config XIP_ROM_SIZE
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hex
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default 0x20000
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endif
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