bb50c67227
On ChromeOS systems with a serial-enabled BIOS and vboot writing a new firmware image to the Chrome EC, it was possible for the TCO watchdog timer to trip 2 times before tco_configure() was called in romstage. This caused an extra reboot of the system (at a rather inopportune time) and because the EC didn't perform a full reset, the system boots into recovery mode. This patch moves the call to tco_configure() for Tiger Lake from romstage to bootblock, in order to make sure the TCO watchdog timer is halted before vboot_sync_ec() runs in romstage. It should be harmless to configure the TCO device earlier in the boot flow. BUG=b:160272400 TEST=boot Volteer (to a non-recovery kernel!) with a freshly imaged EC Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Iefdc2c861ab8b5fde7f736c04149be7de7b3ae0c Reviewed-on: https://review.coreboot.org/c/coreboot/+/43313 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
33 lines
713 B
C
33 lines
713 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootblock_common.h>
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#include <intelblocks/systemagent.h>
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#include <intelblocks/tco.h>
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#include <intelblocks/uart.h>
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#include <soc/bootblock.h>
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asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
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{
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/* Call lib/bootblock.c main */
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bootblock_main_with_basetime(base_timestamp);
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}
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void bootblock_soc_early_init(void)
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{
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bootblock_systemagent_early_init();
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bootblock_pch_early_init();
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bootblock_cpu_init();
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pch_early_iorange_init();
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if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
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uart_bootblock_init();
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}
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void bootblock_soc_init(void)
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{
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report_platform_info();
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pch_init();
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/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
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tco_configure();
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}
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