Files
system76-coreboot/src/drivers
Furquan Shaikh dbce8ba05a drivers/intel/fsp2_0: Allow SoC/mainboard to update NvsBufferPtr
This change moves the check for NvsBufferPtr in S3 resume case to
happen just before FSP-M is called. This allows SoC/mainboard code to
set NvsBufferPtr if it doesn't use the default MRC cache driver.

BUG=b:155990176

Change-Id: Ia272573ad7117a0cb851f0bfe6a4c7989bc64cde
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-10 18:45:47 +00:00
..
2020-06-02 07:42:32 +00:00
2020-05-25 22:19:21 +00:00
2020-06-02 07:42:32 +00:00