Mario Scheithauer bcbcecd38f siemens/mc_apl3: Remove the correction of the Tx signal for SATA ...

For this mainboard the correction of transmit voltage swing from SATA
interface is not necessary.

Change-Id: I900d0d44b88585c223182d85c78cf3ff1e3e9159
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/29527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

2018-11-12 07:25:21 +00:00

..

acpi

arch/x86: Add common AMD ACPI hardware definitions

2017-11-10 19:15:38 +00:00

arch

arch/x86: Fix car_active for CONFIG_NO_CAR_GLOBAL_MIGRATION

2018-11-09 18:21:27 +00:00

commonlib

src: Remove unneeded whitespace

2018-10-23 15:52:09 +00:00

console

console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS

2018-10-18 12:50:41 +00:00

cpu

src: Replace common MSR addresses with macros

2018-11-08 11:35:26 +00:00

device

src: Remove unneeded whitespace

2018-10-23 15:52:09 +00:00

drivers

drivers/*/tpm: Add postcar target

2018-11-09 12:00:52 +00:00

ec

ec/google/chromeec: Configure EC_SYNC_IRQ as level triggered

2018-11-12 05:41:57 +00:00

include

include/program_loading: Add POSTCAR prog type

2018-11-09 12:00:40 +00:00

lib

src/lib/edid: avoid buffer overflow

2018-11-06 14:07:58 +00:00

mainboard

siemens/mc_apl3: Remove the correction of the Tx signal for SATA

2018-11-12 07:25:21 +00:00

northbridge

intel/i945: add timestamps in romstage

2018-11-09 10:20:43 +00:00

security

security/vboot: Add selection for firmware slots used by VBOOT

2018-11-08 16:19:37 +00:00

soc

soc/intel/apollolake: Disable HECI1 before jumping to OS

2018-11-09 18:22:05 +00:00

southbridge

sb/intel: Deduplicate vbnv_cmos_failed and rtc_init

2018-11-07 18:12:39 +00:00

superio

src: Add missing include <stdint.h>

2018-11-01 11:25:07 +00:00

vendorcode

security/vboot: Add selection for firmware slots used by VBOOT

2018-11-08 16:19:37 +00:00

Kconfig

reset: Finalize move to new API

2018-10-31 15:29:42 +00:00