Files
system76-coreboot/util
Carl-Daniel Hailfinger bd7602314b Remove hardcoded wait from SPI write/erase routines and check the chip
status register instead.
This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a
MX25L4005 chip.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18 17:56:42 +00:00
..
2006-10-14 21:35:30 +00:00
2006-10-20 22:21:18 +00:00
2007-04-06 12:14:51 +00:00
2004-10-06 17:33:54 +00:00
2006-12-02 16:48:48 +00:00