bfb11bec3b
Macros can be confusing on their own; hiding commas make things worse.
This can sometimes be downright misleading. A "good" example would be
the code in soc/intel/xeon_sp/spr/chip.c:
CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev,
This appears as CHIP_NAME() being some struct when in fact these are
defining 2 separate members of the same struct.
It was decided to remove this macro altogether, as it does not do
anything special and incurs a maintenance burden.
Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
156 lines
4.3 KiB
C
156 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpi_device.h>
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#include <acpi/acpigen.h>
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#include <acpi/acpigen_pci.h>
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#include <assert.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include "chip.h"
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/*
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* Writes the ACPI power resources for a PCI device so it can enter D3Cold.
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*
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* If the device is a storage class, then the StorageD3Enable _DSD will
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* also be added.
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*
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* e.g.,
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*
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* Scope (\_SB.PCI0.GP14)
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* {
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* Device (NVME)
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* {
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* Name (_PR0, Package (0x01) // _PR0: Power Resources for D0
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* {
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* PRIC
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* })
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* Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot
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* {
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* PRIC
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* })
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* PowerResource (PRIC, 0x00, 0x0000)
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* {
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* Method (_STA, 0, NotSerialized) // _STA: Status
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* {
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* ...
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* }
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*
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* Method (_ON, 0, Serialized) // _ON_: Power On
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* {
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* ...
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* }
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*
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* Method (_OFF, 0, Serialized) // _OFF: Power Off
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* {
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* ...
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* }
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* }
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*
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* Name (_ADR, 0x0000000000000000) // _ADR: Address
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* Method (_STA, 0, NotSerialized) // _STA: Status
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* {
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* Return (0x0F)
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* }
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*
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* Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
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* {
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* ToUUID ("5025030f-842f-4ab4-a561-99a5189762d0"),
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* Package (0x01)
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* {
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* Package (0x02)
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* {
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* "StorageD3Enable",
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* One
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* }
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* }
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* })
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* }
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* }
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*/
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static void pcie_rtd3_device_acpi_fill_ssdt(const struct device *dev)
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{
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const struct drivers_pcie_rtd3_device_config *config = config_of(dev);
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/* Copy the GPIOs to avoid discards 'const' qualifier error */
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struct acpi_gpio reset_gpio = config->reset_gpio;
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struct acpi_gpio enable_gpio = config->enable_gpio;
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const struct acpi_power_res_params power_res_params = {
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.reset_gpio = &reset_gpio,
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.reset_delay_ms = config->reset_delay_ms,
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.reset_off_delay_ms = config->reset_off_delay_ms,
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.enable_gpio = &enable_gpio,
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.enable_delay_ms = config->enable_delay_ms,
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.enable_off_delay_ms = config->enable_off_delay_ms,
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.use_gpio_for_status = true,
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};
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const char *scope = acpi_device_scope(dev);
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const char *name = acpi_device_name(dev);
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assert(name);
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assert(scope);
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printk(BIOS_INFO, "%s.%s: Enable RTD3 for %s (%s)\n", scope, name, dev_path(dev),
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dev->chip_ops->name);
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acpigen_write_scope(scope);
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acpigen_write_device(acpi_device_name(dev));
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acpi_device_add_power_res(&power_res_params);
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acpigen_write_ADR_pci_device(dev);
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acpigen_write_STA(acpi_device_status(dev));
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/* Storage devices won't enter D3 without this property */
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if ((dev->class >> 16) == PCI_BASE_CLASS_STORAGE) {
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acpi_device_add_storage_d3_enable(NULL);
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printk(BIOS_INFO, "%s.%s: Added StorageD3Enable property\n", scope, name);
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}
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acpigen_write_device_end();
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acpigen_write_scope_end();
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/* Call the default PCI acpi_fill_ssdt */
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pci_rom_ssdt(dev);
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}
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static const char *pcie_rtd3_device_acpi_name(const struct device *dev)
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{
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const struct drivers_pcie_rtd3_device_config *config = config_of(dev);
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return config->name;
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}
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static struct device_operations pcie_rtd3_device_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = pci_dev_init,
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.ops_pci = &pci_dev_ops_pci,
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.write_acpi_tables = pci_rom_write_acpi_tables,
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.acpi_fill_ssdt = pcie_rtd3_device_acpi_fill_ssdt,
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.acpi_name = pcie_rtd3_device_acpi_name,
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};
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static void pcie_rtd3_device_enable(struct device *dev)
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{
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struct drivers_pcie_rtd3_device_config *config = dev ? dev->chip_info : NULL;
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if (!config)
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return;
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if (dev->path.type != DEVICE_PATH_PCI) {
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printk(BIOS_ERR, "%s: Invalid device type\n", dev_path(dev));
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return;
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}
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dev->ops = &pcie_rtd3_device_ops;
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}
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struct chip_operations drivers_pcie_rtd3_device_ops = {
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.name = "PCIe Device w/ Runtime D3",
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.enable_dev = pcie_rtd3_device_enable
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};
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