c1081a4d02
Add build infrastructure and basic support code for the ImgTec Danube SoC. This support is sufficient to run on a simulator. BUG=chrome-os-partner:31438 TEST=none yet Change-Id: I59e36589765bf06b075fd4850215a0ef71246bb1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 881278d7fbb8e6803bc8f6f9e84c64640b097401 Original-Change-Id: Ia7ed7288b13085db7ff37b5ad75d978b6137f958 Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207974 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8762 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
70 lines
1.7 KiB
Plaintext
70 lines
1.7 KiB
Plaintext
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2014 Imagination Technologies
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; version 2 of
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# the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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# MA 02110-1301 USA
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#
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config CPU_IMGTEC_DANUBE
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select CPU_MIPS32R2
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select DYNAMIC_CBMEM
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select HAVE_UART_MEMORY_MAPPED
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select HAVE_UART_SPECIAL
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bool
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if CPU_IMGTEC_DANUBE
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config BOOTBLOCK_CPU_INIT
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string
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default "soc/imgtec/danube/bootblock.c"
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config BOOTBLOCK_BASE
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hex
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default 0x9b000000
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config CBFS_ROM_OFFSET
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# Effectively the maximum size of the bootblock
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hex
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default 0x4000
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config ROMSTAGE_BASE
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hex
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default 0x9b004000
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help
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The address where romstage is supposed to be loaded, right above the
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bootblock.
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config CBMEM_CONSOLE_PRERAM_BASE
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hex "memory address of the CBMEM console buffer"
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default 0x9b00f800
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help
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Allocate 4KB to the pre-ram console buffer, we should be able to use
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GRAM eventually and have a much larger buffer.
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config STACK_TOP
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hex
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default CBMEM_CONSOLE_PRERAM_BASE
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config STACK_BOTTOM
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hex
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default 0x9b00f000
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help
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Allocating 12KB for the stack, should be able to have more once GRAM
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is available.
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endif
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