These drivers are needed right away and never really fit into depthcharge's driver model anyway. CQ-DEPEND=CL:194064 BUG=None TEST=Built and booted nyan, link, and peach_pit and verified that timer values in cbmem were reasonable. Built for nyan_big, nyan_blaze and daisy. BRANCH=None Original-Change-Id: Ia7953cfece57524262a6c7d6537082af7a00f4d6 Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/194058 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit f30a410f0a248c93bc34f5868af1596bf8ce3cdd) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I782d20f3cd63210a87c712643c7a53753f5ef301 Reviewed-on: http://review.coreboot.org/7225 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
		
			
				
	
	
		
			116 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			116 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2013 Google Inc.
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions
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|  * are met:
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|  * 1. Redistributions of source code must retain the above copyright
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|  *    notice, this list of conditions and the following disclaimer.
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|  * 2. Redistributions in binary form must reproduce the above copyright
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|  *    notice, this list of conditions and the following disclaimer in the
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|  *    documentation and/or other materials provided with the distribution.
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|  * 3. The name of the author may not be used to endorse or promote products
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|  *    derived from this software without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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|  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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|  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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|  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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|  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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|  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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|  * SUCH DAMAGE.
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|  */
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| 
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| #include <arch/io.h>
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| #include <libpayload.h>
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| #include <libpayload-config.h>
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| #include <stdint.h>
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| 
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| #include "config.h"
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| 
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| struct __attribute__((packed)) mct_regs
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| {
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| 	uint32_t mct_cfg;
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| 	uint8_t reserved0[0xfc];
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| 	uint32_t g_cnt_l;
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| 	uint32_t g_cnt_u;
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| 	uint8_t reserved1[0x8];
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| 	uint32_t g_cnt_wstat;
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| 	uint8_t reserved2[0xec];
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| 	uint32_t g_comp0_l;
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| 	uint32_t g_comp0_u;
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| 	uint32_t g_comp0_addr_incr;
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| 	uint8_t reserved3[0x4];
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| 	uint32_t g_comp1_l;
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| 	uint32_t g_comp1_u;
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| 	uint32_t g_comp1_addr_incr;
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| 	uint8_t reserved4[0x4];
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| 	uint32_t g_comp2_l;
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| 	uint32_t g_comp2_u;
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| 	uint32_t g_comp2_addr_incr;
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| 	uint8_t reserved5[0x4];
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| 	uint32_t g_comp3_l;
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| 	uint32_t g_comp3_u;
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| 	uint32_t g_comp3_addr_incr;
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| 	uint8_t reserved6[0x4];
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| 	uint32_t g_tcon;
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| 	uint32_t g_int_cstat;
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| 	uint32_t g_int_enb;
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| 	uint32_t g_wstat;
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| 	uint8_t reserved7[0xb0];
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| 	uint32_t l0_tcntb;
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| 	uint32_t l0_tcnto;
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| 	uint32_t l0_icntb;
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| 	uint32_t l0_icnto;
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| 	uint32_t l0_frcntb;
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| 	uint32_t l0_frcnto;
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| 	uint8_t reserved8[0x8];
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| 	uint32_t l0_tcon;
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| 	uint8_t reserved9[0xc];
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| 	uint32_t l0_int_cstat;
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| 	uint32_t l0_int_enb;
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| 	uint8_t reserved10[0x8];
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| 	uint32_t l0_wstat;
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| 	uint8_t reserved11[0xbc];
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| 	uint32_t l1_tcntb;
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| 	uint32_t l1_tcnto;
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| 	uint32_t l1_icntb;
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| 	uint32_t l1_icnto;
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| 	uint32_t l1_frcntb;
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| 	uint32_t l1_frcnto;
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| 	uint8_t reserved12[0x8];
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| 	uint32_t l1_tcon;
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| 	uint8_t reserved13[0xc];
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| 	uint32_t l1_int_cstat;
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| 	uint32_t l1_int_enb;
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| 	uint8_t reserved14[0x8];
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| 	uint32_t l1_wstat;
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| };
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| 
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| uint64_t timer_hz(void)
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| {
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| 	return CONFIG_LP_TIMER_MCT_HZ;
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| }
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| 
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| uint64_t timer_raw_value(void)
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| {
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| 	static int enabled = 0;
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| 
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| 	struct mct_regs * const mct =
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| 		(struct mct_regs *)(uintptr_t)CONFIG_LP_TIMER_MCT_ADDRESS;
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| 
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| 	if (!enabled) {
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| 		writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon);
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| 		enabled = 1;
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| 	}
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| 
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| 	uint64_t upper = readl(&mct->g_cnt_u);
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| 	uint64_t lower = readl(&mct->g_cnt_l);
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| 
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| 	return (upper << 32) | lower;
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| }
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