c1d72942f4
We don't need to do explicit pci_io_read/write operations, as we can use MMCONF everywhere. AGESA code still enables extended cf8/cfc should it be needed by payload or OS. Change-Id: Ib08028bda1b5226bb3b6b67e91f514480a9fc5ee Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17536 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
45 lines
938 B
Plaintext
45 lines
938 B
Plaintext
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2012 Advanced Micro Devices, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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config CPU_AMD_PI_00730F01
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bool
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select MMCONF_SUPPORT_DEFAULT
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select X86_AMD_FIXED_MTRRS
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if CPU_AMD_PI_00730F01
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config CPU_ADDR_BITS
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int
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default 40
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config CBB
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hex
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default 0x0
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config CDB
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hex
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default 0x18
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config XIP_ROM_SIZE
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hex
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default 0x100000
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config HIGH_SCRATCH_MEMORY_SIZE
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hex
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# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)
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default 0xA1000
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endif
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