system76-coreboot

Files

Arthur Heymans 74f9fe6e58 cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZE

CPU's featuring a non eviction mode cache the whole ROM.
Therefore XIP stages don't need to follow some alignment constraints.

Change-Id: I4a30f31baa0f90279c0690ceb6aefea6de461bd9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

2019-04-25 15:56:28 +00:00

allwinner

src: Use #include <timer.h> when appropriate

2019-04-06 16:02:49 +00:00

amd

src: Add missing include 'console.h'

2019-04-23 10:00:39 +00:00

armltd

vboot2: add verstage

2015-01-27 01:41:40 +01:00

intel

cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZE