ready (PSON gating). Some boards boot faster than this power well stabilization, and thus see bad data when accessing the smbus registers. Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1